Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp609746pxk; Wed, 16 Sep 2020 12:07:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxlpdj5pR0EINqb13CHTIOaEeQxFbLuqdUtAW07TkVKv6A5DtIORe1ytdfNWGi1fnhURY2T X-Received: by 2002:a50:f199:: with SMTP id x25mr28409292edl.347.1600283265253; Wed, 16 Sep 2020 12:07:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600283265; cv=none; d=google.com; s=arc-20160816; b=hr0uTUlakHdcf19Lgx7TrP8xFPDrFlh9BFmWT1SHsV7nJ0QKGzz7CKZYSLrLvuJsNx nG2Sp7Iaa3zgH9Yy9GtSM/a6R1hhBRfase4ldnRfZ/cLLhXDG8VwonVrm80MpT0eXdc/ V+FHXdwkz5qfpfDbq2eC447qqysKb+Pmc1dpxYvZvorntXoo6W/PQ++ZR3C03DIkzu8p nL21H0LDB8YI9ySGCGnd6IcmXKWy3BeQRqVrSnJu17ZVOWCatowsN2Yhh6DiIiO07VB5 2nucUdD9sVezMoIb3rLpXNM029lFoNP+wSvNUbHeZB4BAWnMMd9elm3v7YPPVYHNWXvL nNtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=eO09TGaCAr+wfWF6yuouzf+qbbkoEytKZ+jYrjSbTs8=; b=gLnzCou2mwBtgVijSHOykOwpfT2QGptv9qcS+vmuaoUjisUueYqdrGEOavYl7ACj40 /GVdSpa5UFSSWxVvBuwPXl7EZEiAT2QpnFmBBSknKzk36ObIfLaj+Sf+91TEhGJ0sRy3 n+ckmyyvl4VyRODjTYtZNHKJN+CFAXWd5YQWzanOOQRq6Z+5tN0k3bf5lcbh9SRk0Idm qdWALwVrAItIUoZ7lrbEAUeF+RHq2kk1BlJBf2BvOTkT48wSSEhxbsxiH1ENwFly+mTb B9rG9fxivLUhMvFLTlkeCgIYTUG6uFVf0jlvzyMQjevQ3y/zZQrkV5/HkeQWud+OzSO/ 4AMw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x11si13333001edl.498.2020.09.16.12.07.22; Wed, 16 Sep 2020 12:07:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727777AbgIPTGs (ORCPT + 99 others); Wed, 16 Sep 2020 15:06:48 -0400 Received: from mail.kernel.org ([198.145.29.99]:36642 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727398AbgIPRpm (ORCPT ); Wed, 16 Sep 2020 13:45:42 -0400 Received: from gaia (unknown [46.69.195.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 902F222283; Wed, 16 Sep 2020 14:56:42 +0000 (UTC) Date: Wed, 16 Sep 2020 15:56:40 +0100 From: Catalin Marinas To: Phil Chang Cc: linux-arm-kernel@lists.infradead.org, Jonathan Corbet , Will Deacon , Mauro Carvalho Chehab , Mark Rutland , Anshuman Khandual , YJ Chiang , Alix Wu , Mike Rapoport , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH] [PATCH] ARM64: Setup DMA32 zone size by bootargs Message-ID: <20200916145639.GC3122@gaia> References: <20200916083703.GA26411@infradead.org> <20200916133324.6280-1-phil.chang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200916133324.6280-1-phil.chang@mediatek.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 16, 2020 at 09:33:24PM +0800, Phil Chang wrote: > this patch allowing the DMA32 zone be configurable in ARM64. > For some devices, the main memory split into 2 part due to the memory > architecture, the efficient and less inefficient part. > One of the use case is fine-tune the dma32 size to contain all the > efficient part of memory block on this kind of architecture > > Signed-off-by: Alix Wu > Signed-off-by: YJ Chiang > Signed-off-by: Phil Chang > --- > Hi > > supplement the reason of this usage. That's really not a good enough justification to merge such patch. As Christoph said, DMA32 is defined as addressing the first 4GB of RAM. Is the memory inefficient (presumably slow) for device or for the CPU? Maybe you can pretend it's a separate NUMA node for the CPU. Alternatively, change your device DMA coherent mask and allocate only from ZONE_DMA (currently first 1GB on arm64). -- Catalin