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Date:   Wed, 16 Sep 2020 10:08:39 -0700
From:   Sean Christopherson <sean.j.christopherson@intel.com>
To:     Alexander Graf <graf@amazon.com>
Cc:     Aaron Lewis <aaronlewis@google.com>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Jonathan Corbet <corbet@lwn.net>,
        Vitaly Kuznetsov <vkuznets@redhat.com>,
        Wanpeng Li <wanpengli@tencent.com>,
        Jim Mattson <jmattson@google.com>,
        Joerg Roedel <joro@8bytes.org>,
        KarimAllah Raslan <karahmed@amazon.de>,
        Dan Carpenter <dan.carpenter@oracle.com>,
        kvm list <kvm@vger.kernel.org>, linux-doc@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 1/7] KVM: x86: Deflect unknown MSR accesses to user
 space
Message-ID: <20200916170839.GD10227@sjchrist-ice>
References: <20200902125935.20646-1-graf@amazon.com>
 <20200902125935.20646-2-graf@amazon.com>
 <CAAAPnDFGD8+5KBCLKERrH0hajHEwU9UdEEGqp3RZu3Lws+5rmw@mail.gmail.com>
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On Wed, Sep 16, 2020 at 11:31:30AM +0200, Alexander Graf wrote:
> On 03.09.20 21:27, Aaron Lewis wrote:
> > > @@ -412,6 +414,15 @@ struct kvm_run {
> > >                          __u64 esr_iss;
> > >                          __u64 fault_ipa;
> > >                  } arm_nisv;
> > > +               /* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */
> > > +               struct {
> > > +                       __u8 error; /* user -> kernel */
> > > +                       __u8 pad[3];
> > 
> > __u8 pad[7] to maintain 8 byte alignment?  unless we can get away with
> > fewer bits for 'reason' and
> > get them from 'pad'.
> 
> Why would we need an 8 byte alignment here? I always thought natural u64
> alignment on x86_64 was on 4 bytes?

u64 will usually (always?) be 8 byte aligned by the compiler.  "Natural"
alignment means an object is aligned to its size.  E.g. an 8-byte object
can split a cache line if it's only aligned on a 4-byte boundary.