Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp1194306pxk; Fri, 18 Sep 2020 06:23:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwIUT8u9MVPlb2AWHbTror0SLVmgyIh53WFCbya1MeEL707901Fh2gIvN1tYG+0EeIRJQPD X-Received: by 2002:a17:906:c2d2:: with SMTP id ch18mr37943967ejb.79.1600435404891; Fri, 18 Sep 2020 06:23:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600435404; cv=none; d=google.com; s=arc-20160816; b=kxoBmPKozAnghDgx9IjTYMhfxl+zrIzJVI4IE+E+MbgH86SdxxvEIZaKpnWju08Fom zyJENCXLwOYQmbgq6FhCJ2JWYqxni5xr6k/RtVXDC+Hi3PnTAExBefZGgsCKPth47gBh 1D7LUKcKcmhTqcf7+Xs3WVr7JTM7/xYVEo37UvL7xWAtRzKngTAk8C7V1XiV7i0pqnZS 8GbMleY9F0qOzpRf8AIn4a9U+wmH4Oo7TgcqVyVzmonKlR3xLXDtnsKPaoAZG3F8ETJZ 54lErG0Rao47utFD5suUyLUI3oH0BOk5R3t1xO+va9ZqjbR5Kq0KtUxhu3w8RJ5TbrfR vnzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=eT3t1pFzPT0eXiIL3Cbg8oufaK5Nzq1A63l84MxmRDY=; b=v42IyxXdG2Yvweyi6j5y/HgRBs6drjIajx80hrHUKt5Hy3ctd0pOqiP3yCUlW1ks/e UoyblgWKjIh0plqANcm7i8JnBq3gWvGiyPCqp9nzfQ8EiU6Cze9fT9x0Sl8uoiPUEDeY Sn0c9BBEtOA17QApDxZIJZP/9LIWPBtjXSPeARfaja5TJfQtXiAZn/LRAZdLW0AN+H24 Wvjfbn2rwR93rNpMi/yooYa9Lm+yleMArbipeoWgHCuv547thAuGvIFLaeItF3VI7qmT hwod4mVG3hPtPpIQugrAZNDsAbeckD26Kpq6qv483u779HhfXpFXTzCvFEDHPEcAK1A+ 0DDg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t17si2627111ejs.91.2020.09.18.06.23.00; Fri, 18 Sep 2020 06:23:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726697AbgIRNV4 (ORCPT + 99 others); Fri, 18 Sep 2020 09:21:56 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:43334 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbgIRNV4 (ORCPT ); Fri, 18 Sep 2020 09:21:56 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kJGKh-00FElo-Rb; Fri, 18 Sep 2020 15:21:47 +0200 Date: Fri, 18 Sep 2020 15:21:47 +0200 From: Andrew Lunn To: Jisheng Zhang Cc: Heiner Kallweit , Russell King , "David S. Miller" , Jakub Kicinski , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next] net: phy: realtek: enable ALDPS to save power for RTL8211F Message-ID: <20200918132147.GB3631014@lunn.ch> References: <20200918104756.557f9129@xhacker.debian> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200918104756.557f9129@xhacker.debian> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 18, 2020 at 10:47:56AM +0800, Jisheng Zhang wrote: > Enable ALDPS function to save power when link down. Hi Jisheng It would be nice to give a hint what ALDPS means. It is not one of the standard acronyms i know of, so it could be Realtek specific. > > Signed-off-by: Jisheng Zhang > --- > drivers/net/phy/realtek.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c > index 95dbe5e8e1d8..961570186822 100644 > --- a/drivers/net/phy/realtek.c > +++ b/drivers/net/phy/realtek.c > @@ -39,6 +39,10 @@ > #define RTL8201F_ISR 0x1e > #define RTL8201F_IER 0x13 > > +#define RTL8211F_ALDPS_PLL_OFF BIT(1) > +#define RTL8211F_ALDPS_ENABLE BIT(2) > +#define RTL8211F_ALDPS_XTAL_OFF BIT(12) > + > #define RTL8366RB_POWER_SAVE 0x15 > #define RTL8366RB_POWER_SAVE_ON BIT(12) > > @@ -178,8 +182,12 @@ static int rtl8211f_config_init(struct phy_device *phydev) > { > struct device *dev = &phydev->mdio.dev; > u16 val_txdly, val_rxdly; > + u16 val; > int ret; > > + val = RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_XTAL_OFF; > + phy_modify_paged_changed(phydev, 0xa43, 0x18, val, val); Could we avoid some of these magic numbers? The datasheet seems to call 0x18 PHYCR1, etc. Andrew