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Date:   Mon, 21 Sep 2020 12:49:20 +0200
From:   Thierry Reding <thierry.reding@gmail.com>
To:     Dmitry Osipenko <digetx@gmail.com>
Cc:     Jonathan Hunter <jonathanh@nvidia.com>,
        Laxman Dewangan <ldewangan@nvidia.com>,
        Wolfram Sang <wsa@the-dreams.de>,
        =?utf-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= <mirq-linux@rere.qmqm.pl>,
        Andy Shevchenko <andy.shevchenko@gmail.com>,
        linux-i2c@vger.kernel.org, linux-tegra@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 06/34] i2c: tegra: Remove
 i2c_dev.clk_divisor_non_hs_mode member
Message-ID: <20200921104920.GB3950626@ulmo>
References: <20200908224006.25636-1-digetx@gmail.com>
 <20200908224006.25636-7-digetx@gmail.com>
 <20200917112541.GR3515672@ulmo>
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On Thu, Sep 17, 2020 at 06:27:28PM +0300, Dmitry Osipenko wrote:
> 17.09.2020 14:25, Thierry Reding =D0=BF=D0=B8=D1=88=D0=B5=D1=82:
> > On Wed, Sep 09, 2020 at 01:39:38AM +0300, Dmitry Osipenko wrote:
> >> The "non_hs_mode" divisor value is fixed, thus there is no need to have
> >> the variable i2c_dev.clk_divisor_non_hs_mode struct member. Let's remo=
ve
> >> it and move the mode selection into tegra_i2c_init() where it can be
> >> united with the timing selection.
> >>
> >> Reviewed-by: Micha=C5=82 Miros=C5=82aw <mirq-linux@rere.qmqm.pl>
> >> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> >> ---
> >>  drivers/i2c/busses/i2c-tegra.c | 46 ++++++++++++++++------------------
> >>  1 file changed, 21 insertions(+), 25 deletions(-)
> >>
> >> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-t=
egra.c
> >> index 720a75439e91..85ed0e02d48c 100644
> >> --- a/drivers/i2c/busses/i2c-tegra.c
> >> +++ b/drivers/i2c/busses/i2c-tegra.c
> >> @@ -250,7 +250,6 @@ struct tegra_i2c_hw_feature {
> >>   * @msg_buf_remaining: size of unsent data in the message buffer
> >>   * @msg_read: identifies read transfers
> >>   * @bus_clk_rate: current I2C bus clock rate
> >> - * @clk_divisor_non_hs_mode: clock divider for non-high-speed modes
> >>   * @is_multimaster_mode: track if I2C controller is in multi-master m=
ode
> >>   * @tx_dma_chan: DMA transmit channel
> >>   * @rx_dma_chan: DMA receive channel
> >> @@ -281,7 +280,6 @@ struct tegra_i2c_dev {
> >>  	size_t msg_buf_remaining;
> >>  	int msg_read;
> >>  	u32 bus_clk_rate;
> >> -	u16 clk_divisor_non_hs_mode;
> >>  	bool is_multimaster_mode;
> >>  	struct dma_chan *tx_dma_chan;
> >>  	struct dma_chan *rx_dma_chan;
> >> @@ -783,6 +781,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2=
c_dev)
> >>  	u32 val;
> >>  	int err;
> >>  	u32 clk_divisor, clk_multiplier;
> >> +	u32 non_hs_mode;
> >>  	u32 tsu_thd;
> >>  	u8 tlow, thigh;
> >> =20
> >> @@ -805,24 +804,33 @@ static int tegra_i2c_init(struct tegra_i2c_dev *=
i2c_dev)
> >>  	if (i2c_dev->is_vi)
> >>  		tegra_i2c_vi_init(i2c_dev);
> >> =20
> >> -	/* Make sure clock divisor programmed correctly */
> >> -	clk_divisor =3D FIELD_PREP(I2C_CLK_DIVISOR_HSMODE,
> >> -				 i2c_dev->hw->clk_divisor_hs_mode) |
> >> -		      FIELD_PREP(I2C_CLK_DIVISOR_STD_FAST_MODE,
> >> -				 i2c_dev->clk_divisor_non_hs_mode);
> >> -	i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR);
> >> -
> >> -	if (i2c_dev->bus_clk_rate > I2C_MAX_STANDARD_MODE_FREQ &&
> >> -	    i2c_dev->bus_clk_rate <=3D I2C_MAX_FAST_MODE_PLUS_FREQ) {
> >> +	switch (i2c_dev->bus_clk_rate) {
> >> +	case I2C_MAX_STANDARD_MODE_FREQ + 1 ... I2C_MAX_FAST_MODE_PLUS_FREQ:
> >=20
> > Is there are particular reason for switching the simple conditional to a
> > switch here? The old variant looks much easier to understand to me.
>=20
> The reason is make it readable :) For me it's too difficult to read > <=3D
> && { } + no proper indentation.

Guess this is very subjective then... It would've been nice to avoid the
+ 1 and instead use the correct enumeration value. I think that would've
made it a little bit easier on the eye.

But anyway, no reason to hold up this patch set:

Reviewed-by: Thierry Reding <treding@nvidia.com>

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