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From:   Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
To:     broonie@kernel.org
Cc:     linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
        git@xilinx.com,
        Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Subject: [RESEND PATCH 3/3] spi: spi-zynqmp-gqspi: Fix incorrect indentation
Date:   Tue, 22 Sep 2020 10:40:16 -0600
Message-Id: <20200922164016.30979-4-amit.kumar-mahapatra@xilinx.com>
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Fixed incorrect indentation in ZynqMP qspi controller driver.

Addresses-checkpatch: "Alignment should match open parenthesis"
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
---
 drivers/spi/spi-zynqmp-gqspi.c | 46 +++++++++++++++++-----------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.=
c
index 7f57923f76ea..c8fa6ee18ae7 100644
--- a/drivers/spi/spi-zynqmp-gqspi.c
+++ b/drivers/spi/spi-zynqmp-gqspi.c
@@ -326,8 +326,8 @@ static void zynqmp_qspi_init_hw(struct zynqmp_qspi *xqs=
pi)
                                 GQSPI_SELECT_FLASH_BUS_LOWER);
        /* Initialize DMA */
        zynqmp_gqspi_write(xqspi,
-                       GQSPI_QSPIDMA_DST_CTRL_OFST,
-                       GQSPI_QSPIDMA_DST_CTRL_RESET_VAL);
+                          GQSPI_QSPIDMA_DST_CTRL_OFST,
+                          GQSPI_QSPIDMA_DST_CTRL_RESET_VAL);

        /* Enable the GQSPI */
        zynqmp_gqspi_write(xqspi, GQSPI_EN_OFST, GQSPI_EN_MASK);
@@ -374,8 +374,8 @@ static void zynqmp_qspi_chipselect(struct spi_device *q=
spi, bool is_high)

        /* Manually start the generic FIFO command */
        zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST,
-                       zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) |
-                       GQSPI_CFG_START_GEN_FIFO_MASK);
+                          zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) |
+                          GQSPI_CFG_START_GEN_FIFO_MASK);

        timeout =3D jiffies + msecs_to_jiffies(1000);

@@ -384,10 +384,9 @@ static void zynqmp_qspi_chipselect(struct spi_device *=
qspi, bool is_high)
                statusreg =3D zynqmp_gqspi_read(xqspi, GQSPI_ISR_OFST);

                if ((statusreg & GQSPI_ISR_GENFIFOEMPTY_MASK) &&
-                       (statusreg & GQSPI_ISR_TXEMPTY_MASK))
+                   (statusreg & GQSPI_ISR_TXEMPTY_MASK))
                        break;
-               else
-                       cpu_relax();
+               cpu_relax();
        } while (!time_after_eq(jiffies, timeout));

        if (time_after_eq(jiffies, timeout))
@@ -549,7 +548,7 @@ static void zynqmp_qspi_readrxfifo(struct zynqmp_qspi *=
xqspi, u32 size)

        while ((count < size) && (xqspi->bytes_to_receive > 0)) {
                if (xqspi->bytes_to_receive >=3D 4) {
-                       (*(u32 *) xqspi->rxbuf) =3D
+                       (*(u32 *)xqspi->rxbuf) =3D
                        zynqmp_gqspi_read(xqspi, GQSPI_RXD_OFST);
                        xqspi->rxbuf +=3D 4;
                        xqspi->bytes_to_receive -=3D 4;
@@ -645,14 +644,14 @@ static void zynqmp_process_dma_irq(struct zynqmp_qspi=
 *xqspi)
        u32 config_reg, genfifoentry;

        dma_unmap_single(xqspi->dev, xqspi->dma_addr,
-                               xqspi->dma_rx_bytes, DMA_FROM_DEVICE);
+                        xqspi->dma_rx_bytes, DMA_FROM_DEVICE);
        xqspi->rxbuf +=3D xqspi->dma_rx_bytes;
        xqspi->bytes_to_receive -=3D xqspi->dma_rx_bytes;
        xqspi->dma_rx_bytes =3D 0;

        /* Disabling the DMA interrupts */
        zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_I_DIS_OFST,
-                                       GQSPI_QSPIDMA_DST_I_EN_DONE_MASK);
+                          GQSPI_QSPIDMA_DST_I_EN_DONE_MASK);

        if (xqspi->bytes_to_receive > 0) {
                /* Switch to IO mode,for remaining bytes to receive */
@@ -670,14 +669,15 @@ static void zynqmp_process_dma_irq(struct zynqmp_qspi=
 *xqspi)

                /* Manual start */
                zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST,
-                       (zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) |
-                       GQSPI_CFG_START_GEN_FIFO_MASK));
+                                  (zynqmp_gqspi_read(xqspi,
+                                                     GQSPI_CONFIG_OFST) |
+                                  GQSPI_CFG_START_GEN_FIFO_MASK));

                /* Enable the RX interrupts for IO mode */
                zynqmp_gqspi_write(xqspi, GQSPI_IER_OFST,
-                               GQSPI_IER_GENFIFOEMPTY_MASK |
-                               GQSPI_IER_RXNEMPTY_MASK |
-                               GQSPI_IER_RXEMPTY_MASK);
+                                  GQSPI_IER_GENFIFOEMPTY_MASK |
+                                  GQSPI_IER_RXNEMPTY_MASK |
+                                  GQSPI_IER_RXEMPTY_MASK);
        }
 }

@@ -708,7 +708,7 @@ static irqreturn_t zynqmp_qspi_irq(int irq, void *dev_i=
d)
                dma_status =3D
                        zynqmp_gqspi_read(xqspi, GQSPI_QSPIDMA_DST_I_STS_OF=
ST);
                zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_I_STS_OFST,
-                                                               dma_status)=
;
+                                  dma_status);
        }

        if (mask & GQSPI_ISR_TXNOT_FULL_MASK) {
@@ -725,8 +725,8 @@ static irqreturn_t zynqmp_qspi_irq(int irq, void *dev_i=
d)
                ret =3D IRQ_HANDLED;
        }

-       if ((xqspi->bytes_to_receive =3D=3D 0) && (xqspi->bytes_to_transfer=
 =3D=3D 0)
-                       && ((status & GQSPI_IRQ_MASK) =3D=3D GQSPI_IRQ_MASK=
)) {
+       if (xqspi->bytes_to_receive =3D=3D 0 && xqspi->bytes_to_transfer =
=3D=3D 0 &&
+           ((status & GQSPI_IRQ_MASK) =3D=3D GQSPI_IRQ_MASK)) {
                zynqmp_gqspi_write(xqspi, GQSPI_IDR_OFST, GQSPI_ISR_IDR_MAS=
K);
                complete(&xqspi->data_completion);
                ret =3D IRQ_HANDLED;
@@ -744,8 +744,8 @@ static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi *=
xqspi)
        dma_addr_t addr;
        u64 dma_align =3D  (u64)(uintptr_t)xqspi->rxbuf;

-       if ((xqspi->bytes_to_receive < 8) ||
-               ((dma_align & GQSPI_DMA_UNALIGN) !=3D 0x0)) {
+       if (xqspi->bytes_to_receive < 8 ||
+           ((dma_align & GQSPI_DMA_UNALIGN) !=3D 0x0)) {
                /* Setting to IO mode */
                config_reg =3D zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
                config_reg &=3D ~GQSPI_CFG_MODE_EN_MASK;
@@ -759,17 +759,17 @@ static void zynqmp_qspi_setuprxdma(struct zynqmp_qspi=
 *xqspi)
        rx_bytes =3D (xqspi->bytes_to_receive - rx_rem);

        addr =3D dma_map_single(xqspi->dev, (void *)xqspi->rxbuf,
-                                               rx_bytes, DMA_FROM_DEVICE);
+                             rx_bytes, DMA_FROM_DEVICE);
        if (dma_mapping_error(xqspi->dev, addr))
                dev_err(xqspi->dev, "ERR:rxdma:memory not mapped\n");

        xqspi->dma_rx_bytes =3D rx_bytes;
        xqspi->dma_addr =3D addr;
        zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_ADDR_OFST,
-                               (u32)(addr & 0xffffffff));
+                          (u32)(addr & 0xffffffff));
        addr =3D ((addr >> 16) >> 16);
        zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_ADDR_MSB_OFST,
-                               ((u32)addr) & 0xfff);
+                          ((u32)addr) & 0xfff);

        /* Enabling the DMA mode */
        config_reg =3D zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST);
--
2.17.1

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