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Subject: Re: [PATCH 1/3] clk: keystone: sci-clk: fix parsing assigned-clock data during probe
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     mturquette@baylibre.com
To:     Tero Kristo <t-kristo@ti.com>, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, ssantosh@kernel.org
Date:   Tue, 22 Sep 2020 12:59:14 -0700
Message-ID: <160080475480.310579.6914069689446777854@swboyd.mtv.corp.google.com>
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Quoting Tero Kristo (2020-09-07 01:57:38)
> The DT clock probe loop incorrectly terminates after processing "clocks"
> only, fix this by re-starting the loop when all entries for current
> DT property have been parsed.
>=20
> Fixes: 8e48b33f9def ("clk: keystone: sci-clk: probe clocks from DT instea=
d of firmware")
> Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---

Applied to clk-next