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Date:   Tue, 22 Sep 2020 19:31:49 -0600
From:   Rob Herring <robh@kernel.org>
To:     Neil Armstrong <narmstrong@baylibre.com>
Cc:     devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        kishon@ti.com, repk@triplefau.lt,
        linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: phy: amlogic,
 meson-axg-mipi-pcie-analog: remove reg attribute
Message-ID: <20200923013149.GA3662065@bogus>
References: <20200915130339.11079-1-narmstrong@baylibre.com>
 <20200915130339.11079-2-narmstrong@baylibre.com>
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On Tue, 15 Sep 2020 15:03:37 +0200, Neil Armstrong wrote:
> The PHY registers happens to be at the beginning of a large zone containing
> interleaved system registers (mainly clocks, power management, PHY control..),
> found in all Amlogic SoC so far.
> 
> The goal is to model it the same way as the other "features" of this zone,
> like Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
> and Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
> and have a coherent bindings scheme over the Amlogic SoCs.
> 
> This update the description, removed the reg attribute then updates the example
> accordingly.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  .../phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 17 +++++++++++------
>  1 file changed, 11 insertions(+), 6 deletions(-)
> 

Acked-by: Rob Herring <robh@kernel.org>