Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp91180pxk; Tue, 22 Sep 2020 19:58:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyR8h9LAQoo9tkddhh5a9+7huGvj0S6Fn0xJeOOqUnYHWfRPLRAikxRDTN7EFXD8uJKPoLw X-Received: by 2002:a17:906:af53:: with SMTP id ly19mr7811706ejb.503.1600829894589; Tue, 22 Sep 2020 19:58:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600829894; cv=none; d=google.com; s=arc-20160816; b=u7C+463tJN9KM8PqVu33tsNUH6Cnk1ixbKNnIrR1mEHuiCXgNBaW3lkO47Z7QFW+mZ PjB0AflglntLl74ktWNwuVWVYiu2VOqHlSMmUgsGiWK5pNcs0lEc228Tn/ZntqaQX79p 9suCGoV9vJCjPWv6DFCJEz6s4FB2R6Ml+Efe9fD+LpNTEo/sMM8g3SOnBo6mMTq0RqPV I6CGBZTz9nJHJSKa3BWHHL4NQnsfyIEzz2dbFTvs8qmGV/V2dhkqxHmWKJ1qz3YrN93W ARKfh6GGo4ZedYDFClWNf2Wm7aFng6NeQ8TIKP3Qohp1qjJB+rU4FDJeii1G4jHQ0fZ6 s7NQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from:ironport-sdr :ironport-sdr; bh=VbAd4+RymL/0oBMMLUtVH/ikc5iShrPkYQd2gvokObc=; b=dq1jEAtcOhXiNXPQGuHV+MHRUljbvFDFV7vWvg20PqXnB0kzi9OMwpB7nSdACFZGjK uPN/Btp+flzA1U9+pMeDwjtI1+srIQpa+RzUBK9zj4ZaXsiKBcvH9s78ZBd6jn4Wv4T8 07AS+K93edkns9eo1pSPvrV4g9z1/a9O1TrVpKIlxmDP6WFdwoZfmPHScj4m9q3s1fjD fhfaWshhtiGp0GVhWsjDFi0MFvJi1jQV4Gn8MV+7zf47XvP0hgZKItdHbYDPCbssctag NaHewfqgRfw/79VMvB2QRTy/bklgB8mfn7y3IY26TrviOyZxr7X/xsxUASIDRD8Bivfs lzmw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h12si11625526eji.486.2020.09.22.19.57.51; Tue, 22 Sep 2020 19:58:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727068AbgIWCTA (ORCPT + 99 others); Tue, 22 Sep 2020 22:19:00 -0400 Received: from mga05.intel.com ([192.55.52.43]:35873 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727032AbgIWCTA (ORCPT ); Tue, 22 Sep 2020 22:19:00 -0400 IronPort-SDR: AvQELZt6Pqboxlg3fCSkjJ9qI7PTEt5t+aCUepr/+GdhWNE7KvSCeYkDuOcysCrW/ng4NFNhrF yNWPaNP2Pxsw== X-IronPort-AV: E=McAfee;i="6000,8403,9752"; a="245592619" X-IronPort-AV: E=Sophos;i="5.77,292,1596524400"; d="scan'208";a="245592619" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Sep 2020 19:18:59 -0700 IronPort-SDR: X/LPQXKVl1RCBoj+7HpbXxnvDLRkutEO5WLKtk7OmldHkKfUpUW2F41eLgRAvP9VYfaF6cEYu4 l3DdlIPU+eQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,292,1596524400"; d="scan'208";a="511453312" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by fmsmga005.fm.intel.com with ESMTP; 22 Sep 2020 19:18:56 -0700 From: Amireddy Mallikarjuna reddy To: dmaengine@vger.kernel.org, vkoul@kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org Cc: linux-kernel@vger.kernel.org, andriy.shevchenko@intel.com, chuanhua.lei@linux.intel.com, cheol.yong.kim@intel.com, qi-ming.wu@intel.com, peter.ujfalusi@ti.com, mallikarjunax.reddy@linux.intel.com, malliamireddy009@gmail.com Subject: [PATCH v7 0/2] Add Intel LGM soc DMA support Date: Wed, 23 Sep 2020 10:18:43 +0800 Message-Id: X-Mailer: git-send-email 2.11.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DMA controller driver for Lightning Mountain(LGM) family of SoCs. The main function of the DMA controller is the transfer of data from/to any DPlus compliant peripheral to/from the memory. A memory to memory copy capability can also be configured. This ldma driver is used for configure the device and channnels for data and control paths. These controllers provide DMA capabilities for a variety of on-chip devices such as SSC, HSNAND and GSWIP. ------------- Future Plans: ------------- LGM SOC also supports Hardware Memory Copy engine. The role of the HW Memory copy engine is to offload memory copy operations from the CPU. Amireddy Mallikarjuna reddy (2): dt-bindings: dma: Add bindings for intel LGM SOC Add Intel LGM soc DMA support. .../devicetree/bindings/dma/intel,ldma.yaml | 135 ++ drivers/dma/Kconfig | 2 + drivers/dma/Makefile | 1 + drivers/dma/lgm/Kconfig | 9 + drivers/dma/lgm/Makefile | 2 + drivers/dma/lgm/lgm-dma.c | 1765 ++++++++++++++++++++ include/linux/dma/lgm_dma.h | 27 + 7 files changed, 1941 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/intel,ldma.yaml create mode 100644 drivers/dma/lgm/Kconfig create mode 100644 drivers/dma/lgm/Makefile create mode 100644 drivers/dma/lgm/lgm-dma.c create mode 100644 include/linux/dma/lgm_dma.h -- 2.11.0