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[23.128.96.18]) by mx.google.com with ESMTP id r21si12324276edm.221.2020.09.22.23.35.50; Tue, 22 Sep 2020 23:36:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=n9aDLvID; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726811AbgIWGeb (ORCPT + 99 others); Wed, 23 Sep 2020 02:34:31 -0400 Received: from mail.kernel.org ([198.145.29.99]:45180 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726179AbgIWGe2 (ORCPT ); Wed, 23 Sep 2020 02:34:28 -0400 Received: from localhost.localdomain (unknown [122.171.175.143]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1B09021D43; Wed, 23 Sep 2020 06:34:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600842867; bh=5NhYkOe5z+EDgjHdtmMDlcbqzXB5L7tB3OyqW3NgFwA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n9aDLvIDHvRXozBvYRFlXy1gOIntllDy0wBNDdzMOGIcIDqiRYHh/zbFPqIyfmSVW Yhuihq2xMF/Yv0dm1I4dwdpD+ZuWj1+JzjMVhazFCiUjOKSx3dHp+kP4dS7xTEO/6n ET/ZfUtkoUpH1Nym+7ej1Qdv3BYvrN4umXFSdUyE= From: Vinod Koul To: dmaengine@vger.kernel.org Cc: Vinod Koul , Rob Herring , Bjorn Andersson , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Ujfalusi Subject: [PATCH v3 2/3] dmaengine: add peripheral configuration Date: Wed, 23 Sep 2020 12:04:09 +0530 Message-Id: <20200923063410.3431917-3-vkoul@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200923063410.3431917-1-vkoul@kernel.org> References: <20200923063410.3431917-1-vkoul@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some complex dmaengine controllers have capability to program the peripheral device, so pass on the peripheral configuration as part of dma_slave_config Signed-off-by: Vinod Koul --- include/linux/dmaengine.h | 91 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 6fbd5c99e30c..bbc32271ad7f 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -380,6 +380,94 @@ enum dma_slave_buswidth { DMA_SLAVE_BUSWIDTH_64_BYTES = 64, }; +/** + * enum spi_transfer_cmd - spi transfer commands + */ +enum spi_transfer_cmd { + SPI_TX = 1, + SPI_RX, + SPI_DUPLEX, +}; + +/** + * struct dmaengine_spi_config - spi config for peripheral + * + * @loopback_en: spi loopback enable when set + * @clock_pol: clock polarity + * @data_pol: data polarity + * @pack_en: process tx/rx buffers as packed + * @word_len: spi word length + * @clk_div: source clock divider + * @clk_src: serial clock + * @cmd: spi cmd + * @cs: chip select toggle + */ +struct dmaengine_spi_config { + u8 loopback_en; + u8 clock_pol; + u8 data_pol; + u8 pack_en; + u8 word_len; + u32 clk_div; + u32 clk_src; + u8 fragmentation; + enum spi_transfer_cmd cmd; + u8 cs; +}; + +enum i2c_op { + I2C_WRITE = 1, + I2C_READ, +}; + +/** + * struct dmaengine_i2c_config - i2c config for peripheral + * + * @pack_enable: process tx/rx buffers as packed + * @cycle_count: clock cycles to be sent + * @high_count: high period of clock + * @low_count: low period of clock + * @clk_div: source clock divider + * @addr: i2c bus address + * @stretch: stretch the clock at eot + * @op: i2c cmd + */ +struct dmaengine_i2c_config { + u8 pack_enable; + u8 cycle_count; + u8 high_count; + u8 low_count; + u16 clk_div; + u8 addr; + u8 stretch; + enum i2c_op op; + bool multi_msg; +}; + +enum dmaengine_peripheral { + DMAENGINE_PERIPHERAL_SPI = 1, + DMAENGINE_PERIPHERAL_UART = 2, + DMAENGINE_PERIPHERAL_I2C = 3, + DMAENGINE_PERIPHERAL_LAST = DMAENGINE_PERIPHERAL_I2C, +}; + +/** + * struct dmaengine_peripheral_config - peripheral configuration for + * dmaengine peripherals + * + * @peripheral: type of peripheral to DMA to/from + * @set_config: set peripheral config + * @rx_len: receive length for buffer + * @spi: peripheral config for spi + * @i2c: peripheral config for i2c + */ +struct dmaengine_peripheral_config { + enum dmaengine_peripheral peripheral; + u8 set_config; + u32 rx_len; + struct dmaengine_spi_config spi; + struct dmaengine_i2c_config i2c; +}; /** * struct dma_slave_config - dma slave channel runtime config * @direction: whether the data shall go in or out on this slave @@ -418,6 +506,8 @@ enum dma_slave_buswidth { * @slave_id: Slave requester id. Only valid for slave channels. The dma * slave peripheral will have unique id as dma requester which need to be * pass as slave config. + * @peripheral: peripheral configuration for programming peripheral for + * dmaengine transfer * * This struct is passed in as configuration data to a DMA engine * in order to set up a certain channel for DMA transport at runtime. @@ -443,6 +533,7 @@ struct dma_slave_config { u32 dst_port_window_size; bool device_fc; unsigned int slave_id; + struct dmaengine_peripheral_config *peripheral; }; /** -- 2.26.2