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Wed, 23 Sep 2020 10:11:52 +0000 From: Suravee Suthikulpanit To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: joro@8bytes.org, Suravee Suthikulpanit Subject: [PATCH 12/13] iommu: amd: Introduce iommu_v1_map_page and iommu_v1_unmap_page Date: Wed, 23 Sep 2020 10:14:41 +0000 Message-Id: <20200923101442.73157-13-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200923101442.73157-1-suravee.suthikulpanit@amd.com> References: <20200923101442.73157-1-suravee.suthikulpanit@amd.com> Content-Type: text/plain X-Originating-IP: [165.204.78.2] X-ClientProxiedBy: SN4PR0601CA0003.namprd06.prod.outlook.com (2603:10b6:803:2f::13) To DM5PR12MB1163.namprd12.prod.outlook.com (2603:10b6:3:7a::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from ethanolx5673host.amd.com (165.204.78.2) by SN4PR0601CA0003.namprd06.prod.outlook.com (2603:10b6:803:2f::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3412.20 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: P7h5KTTiAnrrDmijpGveFfY3BnIsTGvJzzS+jYcBtGo893558xzm09/Be6k6vq1DMgSCStoMFC8IQEvVSPTlpVU9hHEg34OswMGqXQAj5Cw7Qek/E3/+BRjIvDy4OqP6tCZ+2XGkKtIP7KqHfA0wFHSbiVmH9B2kCops4MQ4kQoZoDnZxL4ob30Nm4jQHx4IKJhvkFPG418+QsE/OAfi/evGhVfLLB7nPntPA3V1RrVsPTVx+BhxuASQT9kc1WNLARWJrWIwxbNqFg667HAnUR7NfqWBYohWKaaty2+11apdWMMb92fPJ2nDOHQpdEThrQ9s1OYr++OfO4Zi0sJ/REriM5SX8SXCdxAgPW3hrXCIi1wr62BMO1CIa3N/aZCMj2BxBPHbO/dxuffLdDPIYYCVBwCDlwnc2Ju9E1VIIfg5X88cFMnpnjDRcRhTmOAbuceUSUxwJpJYOG+WXLpR9hDWQl4S67IsDviTcUCpXS5CMN05zmwaZ1CmQOk8v2zRgejHOxkFOw8dfm2sLnon0cuxN+/MQoOWLrolCNvnPksDltlDU4iD4ARQ2Lt3hcV2dipdGjZdryzpUUFBSahbW9LJxUdOP+fb2jOdVq3+jlm3vOWU+mgvpj/1GAcMEiSRoQ3C3jZM6ZrDSb8qG2qXrQ== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: c64ca583-3c47-4784-3238-08d85fa917a1 X-MS-Exchange-CrossTenant-AuthSource: DM5PR12MB1163.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Sep 2020 10:11:52.7515 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: r5QlCVt9/Cnn2zLQ7K6wNyZaijZWM88WjPsBpaBbd9n4w2lsTb+kjoCo1zEQTyEgF9+/PuRNpjmPqlDRaOaTVg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4217 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org These implement map and unmap for AMD IOMMU v1 pagetable, which will be used by the IO pagetable framework. Also clean up unused extern function declarations. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 13 ------------- drivers/iommu/amd/io_pgtable.c | 25 ++++++++++++------------- drivers/iommu/amd/iommu.c | 7 ++++--- 3 files changed, 16 insertions(+), 29 deletions(-) diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index 69996e57fae2..2e8dc2a1ec0f 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -124,19 +124,6 @@ void amd_iommu_apply_ivrs_quirks(void); static inline void amd_iommu_apply_ivrs_quirks(void) { } #endif -/* TODO: These are temporary and will be removed once fully transition */ -extern int iommu_map_page(struct protection_domain *dom, - unsigned long bus_addr, - unsigned long phys_addr, - unsigned long page_size, - int prot, - gfp_t gfp); -extern unsigned long iommu_unmap_page(struct protection_domain *dom, - unsigned long bus_addr, - unsigned long page_size); -extern u64 *fetch_pte(struct amd_io_pgtable *pgtable, - unsigned long address, - unsigned long *page_size); extern void amd_iommu_domain_set_pgtable(struct protection_domain *domain, u64 *root, int mode); extern void amd_iommu_free_pgtable(struct amd_io_pgtable *pgtable); diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c index 2f36bab23516..7f7be302c538 100644 --- a/drivers/iommu/amd/io_pgtable.c +++ b/drivers/iommu/amd/io_pgtable.c @@ -348,9 +348,9 @@ static u64 *alloc_pte(struct protection_domain *domain, * This function checks if there is a PTE for a given dma address. If * there is one, it returns the pointer to it. */ -u64 *fetch_pte(struct amd_io_pgtable *pgtable, - unsigned long address, - unsigned long *page_size) +static u64 *fetch_pte(struct amd_io_pgtable *pgtable, + unsigned long address, + unsigned long *page_size) { int level; u64 *pte; @@ -423,13 +423,10 @@ static struct page *free_clear_pte(u64 *pte, u64 pteval, struct page *freelist) * supporting all features of AMD IOMMU page tables like level skipping * and full 64 bit address spaces. */ -int iommu_map_page(struct protection_domain *dom, - unsigned long iova, - unsigned long paddr, - unsigned long size, - int prot, - gfp_t gfp) +static int iommu_v1_map_page(struct io_pgtable_ops *ops, unsigned long iova, + phys_addr_t paddr, size_t size, int prot, gfp_t gfp) { + struct protection_domain *dom = io_pgtable_ops_to_domain(ops); struct page *freelist = NULL; bool updated = false; u64 __pte, *pte; @@ -492,11 +489,11 @@ int iommu_map_page(struct protection_domain *dom, return ret; } -unsigned long iommu_unmap_page(struct protection_domain *dom, - unsigned long iova, - unsigned long size) +static unsigned long iommu_v1_unmap_page(struct io_pgtable_ops *ops, + unsigned long iova, + size_t size, + struct iommu_iotlb_gather *gather) { - struct io_pgtable_ops *ops = &dom->iop.iop.ops; struct amd_io_pgtable *pgtable = io_pgtable_ops_to_data(ops); unsigned long long unmapped; unsigned long unmap_size; @@ -571,6 +568,8 @@ static struct io_pgtable *v1_alloc_pgtable(struct io_pgtable_cfg *cfg, void *coo { struct protection_domain *pdom = (struct protection_domain *)cookie; + pdom->iop.iop.ops.map = iommu_v1_map_page; + pdom->iop.iop.ops.unmap = iommu_v1_unmap_page; pdom->iop.iop.ops.iova_to_phys = iommu_v1_iova_to_phys; return &pdom->iop.iop; } diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 9a1a16031e00..77f44b927ae7 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -2044,6 +2044,7 @@ static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, gfp_t gfp) { struct protection_domain *domain = to_pdomain(dom); + struct io_pgtable_ops *ops = &domain->iop.iop.ops; int prot = 0; int ret; @@ -2055,8 +2056,7 @@ static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, if (iommu_prot & IOMMU_WRITE) prot |= IOMMU_PROT_IW; - ret = iommu_map_page(domain, iova, paddr, page_size, prot, gfp); - + ret = ops->map(ops, iova, paddr, page_size, prot, gfp); domain_flush_np_cache(domain, iova, page_size); return ret; @@ -2067,11 +2067,12 @@ static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, struct iommu_iotlb_gather *gather) { struct protection_domain *domain = to_pdomain(dom); + struct io_pgtable_ops *ops = &domain->iop.iop.ops; if (domain->iop.mode == PAGE_MODE_NONE) return 0; - return iommu_unmap_page(domain, iova, page_size); + return ops->unmap(ops, iova, page_size, gather); } static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, -- 2.17.1