Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp307195pxk; Wed, 23 Sep 2020 03:55:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxewUSD016z4qd9miuGF1eECkOZhwYJipcG1kqnXDUgCeNuuEigzHSg+s31IVJa4a0wF3Ab X-Received: by 2002:aa7:d6c4:: with SMTP id x4mr8980237edr.98.1600858520459; Wed, 23 Sep 2020 03:55:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600858520; cv=none; d=google.com; s=arc-20160816; b=trQCLFo+eV8/Rh6fNnM3GEvn5JEzogBnCX1se/n1d9F2glQCPt5H42HO8zSDUu/c/o tQbj1H9BB7KOU8p7CLMhhwyhFTdgHoXlElLLJZRVGJWeNiFN86U9z1shwYJOQDQFqLUI ydxSgT42oPuxy1A76BtzQTFEdaHxsWt76VDRKeok5SRcmpxoJ5Y4nUre1Ldxqnw8oWXa 43FNMdv1aIF/yggA+LStzbOXSOK+4JZOB3h9uQNuUYakSVqWYgqorXQEkQX9O6dGEnen 7e3PhBsWCTHsuGAj52d0RfeT5hwJAE10/IiruvBkRrb7+jyiCwYegnHfv7XdRn+xElNz 4M6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=RwvV4fff1/3YbuFQjSkZJTR5Z25J5Mw1lL9+HBJUs00=; b=Xuu7h58wVss8PRD2Vf2pcZxsyaQhOMENXcYIyscTsfexrtkkxdYuTOdZy4lNIDUXGq DR/JqPf9OeCBfVV1x18NW/meBkGj7ge7zUS5eq15IU1vQYewO5yTa7fKiQhtOc/+n5rg mjxAd2UYScYBB41beKOnNlbu8jXoewh//hVS9pB3Okesx1Z/w10Y2wtzvdcRJsFiiHWS VAsjwLfpwBs1k14Wdhd9jW5IandjhhZ3XUvXtOh+tUnY1dZ4juPc/M3bhEbogWw9lWkk 03hccPk+le0K2Y9O9Tr2uTw33mWXJLLpaKp33Mb6eu04wDrpAegWoek6MxBpoifvzbGi waCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=TMvk0e86; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n13si12907682edy.54.2020.09.23.03.54.57; Wed, 23 Sep 2020 03:55:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=TMvk0e86; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726731AbgIWKw6 (ORCPT + 99 others); Wed, 23 Sep 2020 06:52:58 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:48708 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726130AbgIWKw5 (ORCPT ); Wed, 23 Sep 2020 06:52:57 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 08NAqhnj128471; Wed, 23 Sep 2020 05:52:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1600858363; bh=RwvV4fff1/3YbuFQjSkZJTR5Z25J5Mw1lL9+HBJUs00=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TMvk0e86KN9AH15NYeySRL15tjlImJ8mvy9FoGu2ZrkrsQykhEocZTfXnGsPDaLDw FT0Ua6pcwpzONOY6m08+NaWCb+kv4uWWtwjpET9JkY/e2kMsUsYuBX4hrPANNFGLDP t0FouPqpyiTJ4D0anoNg3DhIA+8nBJvREgYv57ds= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 08NAqhBm006131 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 23 Sep 2020 05:52:43 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 23 Sep 2020 05:52:43 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 23 Sep 2020 05:52:43 -0500 Received: from a0230074-Latitude-E7470.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08NAq7qn059762; Wed, 23 Sep 2020 05:52:38 -0500 From: Faiz Abbas To: , , , CC: , , , , Subject: [PATCH 6/6] mmc: sdhci_am654: Enable tuning for SDR50 Date: Wed, 23 Sep 2020 16:22:06 +0530 Message-ID: <20200923105206.7988-7-faiz_abbas@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200923105206.7988-1-faiz_abbas@ti.com> References: <20200923105206.7988-1-faiz_abbas@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According to the SW tuning App note[1], tuning is required for all UHS speed modes. Tuning for SDR50 is not enabled in Capabilities by default so enable it from the CTL_CFG registers. [1] https://www.ti.com/lit/pdf/spract9 Signed-off-by: Faiz Abbas --- drivers/mmc/host/sdhci_am654.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 5af7638ad606..2bce962bf7e4 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -19,9 +19,11 @@ /* CTL_CFG Registers */ #define CTL_CFG_2 0x14 +#define CTL_CFG_3 0x18 #define SLOTTYPE_MASK GENMASK(31, 30) #define SLOTTYPE_EMBEDDED BIT(30) +#define TUNINGFORSDR50_MASK BIT(13) /* PHY Registers */ #define PHY_CTRL1 0x100 @@ -646,6 +648,10 @@ static int sdhci_am654_init(struct sdhci_host *host) regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK, ctl_cfg_2); + /* Enable tuning for SDR50 */ + regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK, + TUNINGFORSDR50_MASK); + ret = sdhci_setup_host(host); if (ret) return ret; -- 2.17.1