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Subject: Re: [PATCH] perf annotate mips: Add perf arch instructions annotate
 handlers
To:     Peng Fan <fanpeng@loongson.cn>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>
Cc:     Mark Rutland <mark.rutland@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@redhat.com>,
        Namhyung Kim <namhyung@kernel.org>,
        Dengcheng Zhu <dzhu@wavecomp.com>,
        Paul Burton <paulburton@kernel.org>,
        Ravi Bangoria <ravi.bangoria@linux.ibm.com>,
        Ian Rogers <irogers@google.com>, linux-kernel@vger.kernel.org,
        linux-mips@vger.kernel.org
References: <1600858584-6161-1-git-send-email-fanpeng@loongson.cn>
From:   Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-ID: <0753902c-07c9-4390-7ffe-ff02cd1c87e1@flygoat.com>
Date:   Wed, 23 Sep 2020 21:11:01 +0800
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?? 2020/9/23 18:56, Peng Fan д??:
> From: Dengcheng Zhu <dzhu@wavecomp.com>
>
> Support the MIPS architecture using the ins_ops association
> method. With this patch, perf-annotate can work well on MIPS.
>
> Testing it with a perf.data file collected on a mips machine:
> $./perf annotate -i perf.data
>
>           :           Disassembly of section .text:
>           :
>           :           00000000000be6a0 <get_next_seq>:
>           :           get_next_seq():
>      0.00 :   be6a0:       lw      v0,0(a0)
>      0.00 :   be6a4:       daddiu  sp,sp,-128
>      0.00 :   be6a8:       ld      a7,72(a0)
>      0.00 :   be6ac:       gssq    s5,s4,80(sp)
>      0.00 :   be6b0:       gssq    s1,s0,48(sp)
>      0.00 :   be6b4:       gssq    s8,gp,112(sp)
>      0.00 :   be6b8:       gssq    s7,s6,96(sp)
>      0.00 :   be6bc:       gssq    s3,s2,64(sp)
>      0.00 :   be6c0:       sd      a3,0(sp)
>      0.00 :   be6c4:       move    s0,a0
>      0.00 :   be6c8:       sd      v0,32(sp)
>      0.00 :   be6cc:       sd      a5,8(sp)
>      0.00 :   be6d0:       sd      zero,8(a0)
>      0.00 :   be6d4:       sd      a6,16(sp)
>      0.00 :   be6d8:       ld      s2,48(a0)
>      8.53 :   be6dc:       ld      s1,40(a0)
>      9.42 :   be6e0:       ld      v1,32(a0)
>      0.00 :   be6e4:       nop
>      0.00 :   be6e8:       ld      s4,24(a0)
>      0.00 :   be6ec:       ld      s5,16(a0)
>      0.00 :   be6f0:       sd      a7,40(sp)
>     10.11 :   be6f4:       ld      s6,64(a0)
> ...
>
> The original patch link is:
> https://lore.kernel.org/patchwork/patch/1180480/
>
> Signed-off-by: Dengcheng Zhu <dzhu@wavecomp.com>
> Signed-off-by: Peng Fan <fanpeng@loongson.cn>
> ---
>
> Add "bgtzl", "bltzl", "bgezl", "blezl", "beql"
> and "bnel", remove "bgtzal", "blezal", "beqzal",
> "bnezal" and "jialc". Because these five can not
> be found in the instruction manual.

Hi Peng Fan,

These instructions do exist in MIPS Release 6.
Please see MD00086-2B-MIPS32BIS-AFP-6.06[1].

Also I'd sugguest you to note your changes in commit
message instead of comments, Like:

```
Signed-off-by: Dengcheng Zhu <dzhu@wavecomp.com>
Signed-off-by: Peng Fan <fanpeng@loongson.cn>
[fanpeng@loongson.cn: Add missing "bgtzl", "bltzl",
"bgezl", "blezl", "beql" and "bnel" for pre-R6 processors]
```

Thanks.

[1]: 
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00086-2B-MIPS32BIS-AFP-6.06.pdf

- Jiaxun
>
>   tools/perf/arch/mips/Build                   |  2 +-
>   tools/perf/arch/mips/annotate/instructions.c | 41 ++++++++++++++++++++++++++++
>   tools/perf/util/annotate.c                   |  8 ++++++
>   3 files changed, 50 insertions(+), 1 deletion(-)
>   create mode 100644 tools/perf/arch/mips/annotate/instructions.c
>
> diff --git a/tools/perf/arch/mips/Build b/tools/perf/arch/mips/Build
> index 1bb8bf6..e4e5f33 100644
> --- a/tools/perf/arch/mips/Build
> +++ b/tools/perf/arch/mips/Build
> @@ -1 +1 @@
> -# empty
> +perf-y += util/
> diff --git a/tools/perf/arch/mips/annotate/instructions.c b/tools/perf/arch/mips/annotate/instructions.c
> new file mode 100644
> index 0000000..8fae8a1
> --- /dev/null
> +++ b/tools/perf/arch/mips/annotate/instructions.c
> @@ -0,0 +1,41 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +static
> +struct ins_ops *mips__associate_ins_ops(struct arch *arch, const char *name)
> +{
> +	struct ins_ops *ops = NULL;
> +
> +	if (!strncmp(name, "bal", 3) ||
> +	    !strncmp(name, "bgezal", 6) ||
> +	    !strncmp(name, "bltzal", 6) ||
> +	    !strncmp(name, "bgtzl", 5) ||
> +	    !strncmp(name, "bltzl", 5) ||
> +	    !strncmp(name, "bgezl", 5) ||
> +	    !strncmp(name, "blezl", 5) ||
> +	    !strncmp(name, "beql", 4) ||
> +	    !strncmp(name, "bnel", 4) ||
> +	    !strncmp(name, "jal", 3))
> +		ops = &call_ops;
> +	else if (!strncmp(name, "jr", 2))
> +		ops = &ret_ops;
> +	else if (name[0] == 'j' || name[0] == 'b')
> +		ops = &jump_ops;
> +	else
> +		return NULL;
> +
> +	arch__associate_ins_ops(arch, name, ops);
> +
> +	return ops;
> +}
> +
> +static
> +int mips__annotate_init(struct arch *arch, char *cpuid __maybe_unused)
> +{
> +	if (!arch->initialized) {
> +		arch->associate_instruction_ops = mips__associate_ins_ops;
> +		arch->initialized = true;
> +		arch->objdump.comment_char = '#';
> +	}
> +
> +	return 0;
> +}
> diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
> index 0a1fcf7..80a4a3d 100644
> --- a/tools/perf/util/annotate.c
> +++ b/tools/perf/util/annotate.c
> @@ -152,6 +152,7 @@ static int arch__associate_ins_ops(struct arch* arch, const char *name, struct i
>   #include "arch/arm/annotate/instructions.c"
>   #include "arch/arm64/annotate/instructions.c"
>   #include "arch/csky/annotate/instructions.c"
> +#include "arch/mips/annotate/instructions.c"
>   #include "arch/x86/annotate/instructions.c"
>   #include "arch/powerpc/annotate/instructions.c"
>   #include "arch/s390/annotate/instructions.c"
> @@ -175,6 +176,13 @@ static struct arch architectures[] = {
>   		.init = csky__annotate_init,
>   	},
>   	{
> +		.name = "mips",
> +		.init = mips__annotate_init,
> +		.objdump = {
> +			.comment_char = '#',
> +		},
> +	},
> +	{
>   		.name = "x86",
>   		.init = x86__annotate_init,
>   		.instructions = x86__instructions,