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References: <20200904030958.13325-1-jonathan@marek.ca> <20200904030958.13325-6-jonathan@marek.ca> <160080040123.310579.8471841951357841843@swboyd.mtv.corp.google.com> <0ce9fdb6-e224-ced7-ec32-fe67b2ca6127@marek.ca>
Subject: Re: [PATCH v2 5/5] clk: qcom: add video clock controller driver for SM8250
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Michael Turquette <mturquette@baylibre.com>,
        linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
To:     Jonathan Marek <jonathan@marek.ca>, linux-arm-msm@vger.kernel.org
Date:   Wed, 23 Sep 2020 16:30:33 -0700
Message-ID: <160090383364.310579.1979253418505275623@swboyd.mtv.corp.google.com>
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Quoting Jonathan Marek (2020-09-23 09:07:16)
> On 9/22/20 2:46 PM, Stephen Boyd wrote:
> > Quoting Jonathan Marek (2020-09-03 20:09:54)
> >=20
> >> +                       .ops =3D &clk_branch2_ops,
> >> +               },
> >> +       },
> >> +};
> >> +
> >> +static struct clk_branch video_cc_mvs0_clk =3D {
> >> +       .halt_reg =3D 0xd34,
> >> +       .halt_check =3D BRANCH_HALT_SKIP, /* TODO: hw gated ? */
> >=20
> > Is this resolved?
> >=20
>=20
> Downstream has this clock as BRANCH_HALT_VOTED, but with the upstream=20
> venus driver (with patches to enable sm8250), that results in a=20
> "video_cc_mvs0_clk status stuck at 'off" error. AFAIK venus=20
> enables/disables this clock on its own (venus still works without=20
> touching this clock), but I didn't want to remove this in case it might=20
> be needed. I removed these clocks in the v3 I just sent.
>=20

Hmm. Does downstream use these clks? There have been some clk stuck
problems with venus recently that were attributed to improperly enabling
clks before enabling interconnects and power domains. Maybe it's the
same problem.