Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp1111421pxk; Fri, 25 Sep 2020 06:35:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx9VwPisTV/NdJ0/bMM8EhDRxo/v+c7vLYDEpo4tnuA0oP4t7E5riSrYpMQyElUEufZk14e X-Received: by 2002:a05:6402:164d:: with SMTP id s13mr1347603edx.222.1601040939704; Fri, 25 Sep 2020 06:35:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601040939; cv=none; d=google.com; s=arc-20160816; b=ryVeG/YvgJu2rPY3ZCeyaFaKE9H7x59o7AjZhpqrRaF3906xErV4v3LGVak4CdkRph J/N41mGG+RpiF4Pml8BjSsfFNAe8N0wSvjtWr9HqUTH/si0TvQFlCTthZpGA4qhnxHNN TOLhtgGAxtQWwVJP778+e/Pi3di5+TUdY6+Fz3chBx3KWHcXzTTVnukuQzycvy6nuZGB pmUiF3iX3/Io4+Ao/crt1nkOJYI8v7Sg/JzeWzGmnMUPQ3fqYvJBr2zbGuGvURbg558M L7b1nQ+X8V+F2mM0t6JnR6eBI18oEUffUkGmeTqnr1tBuhTM93AB5Qa0QwgB5aKvM04h LQiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=1Sh5/9RGS8w5884F2JP17GhzrFn8E8naDs+qTqtKmso=; b=tAKN+BU2G8I/zkbm1kT3LNDQm62yJTWjJWzd9Gb/tWh5D/WNRyreuNAVPB5DLel9uE mH1Cw3y6vuLnyFZ5FlycwNDhiLQC0+HBZc1YWvWJzkqyxtRQvF7Lofv0n+42B/Hbiw11 OlXOSsdzUo/77x6Fg+DTatUfBVrYyizzXmkGlB3COZw0hTrO5lwOi6Mh83s2dIjpmuOp OY4ACMtuagTu1jfcoBAQ6c6wQ60cO9SAApzZdmDA3uf8w8SApWfcN6zjGG3ZMmoQz5Up le75f2RaP5vF7IEiRxvb6EOUZzVflk9qbNe1nJ259M6UaAvoydfPcW4il+kd9+shCWkM T5lA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r25si2489363edc.164.2020.09.25.06.35.16; Fri, 25 Sep 2020 06:35:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728957AbgIYNeG (ORCPT + 99 others); Fri, 25 Sep 2020 09:34:06 -0400 Received: from inva021.nxp.com ([92.121.34.21]:34812 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728894AbgIYNeB (ORCPT ); Fri, 25 Sep 2020 09:34:01 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5AAA22005FF; Fri, 25 Sep 2020 15:25:09 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4DDA52005E9; Fri, 25 Sep 2020 15:25:09 +0200 (CEST) Received: from fsr-ub1864-126.ea.freescale.net (fsr-ub1864-126.ea.freescale.net [10.171.82.212]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 177262030E; Fri, 25 Sep 2020 15:25:09 +0200 (CEST) From: Ioana Ciornei To: shawnguo@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ioana Ciornei Subject: [PATCH 8/9] arm64: dts: lx2160a: add PCS MDIO and PCS PHY nodes Date: Fri, 25 Sep 2020 16:25:02 +0300 Message-Id: <20200925132503.30206-9-ioana.ciornei@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200925132503.30206-1-ioana.ciornei@nxp.com> References: <20200925132503.30206-1-ioana.ciornei@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add PCS MDIO nodes for the internal MDIO buses on the LX2160A, along with their internal PCS PHYs, which will be used when the DPMAC is in TYPE_PHY mode. Signed-off-by: Ioana Ciornei --- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 252 ++++++++++++++++++ 1 file changed, 252 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index d247e4228d60..a7f808a96dc4 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -1305,6 +1305,240 @@ emdio2: mdio@8b97000 { status = "disabled"; }; + pcs_mdio1: mdio@8c07000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c07000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs1: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio2: mdio@8c0b000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c0b000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs2: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio3: mdio@8c0f000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c0f000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs3: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio4: mdio@8c13000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c13000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs4: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio5: mdio@8c17000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c17000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs5: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio6: mdio@8c1b000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c1b000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs6: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio7: mdio@8c1f000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c1f000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs7: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio8: mdio@8c23000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c23000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs8: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio9: mdio@8c27000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c27000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs9: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio10: mdio@8c2b000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c2b000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs10: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio11: mdio@8c2f000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c2f000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs11: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio12: mdio@8c33000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c33000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs12: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio13: mdio@8c37000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c37000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs13: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio14: mdio@8c3b000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c3b000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs14: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio15: mdio@8c3f000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c3f000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs15: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio16: mdio@8c43000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c43000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs16: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio17: mdio@8c47000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c47000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs17: pcs-phy@0 { + reg = <0>; + }; + }; + + pcs_mdio18: mdio@8c4b000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c4b000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs18: pcs-phy@0 { + reg = <0>; + }; + }; + fsl_mc: fsl-mc@80c000000 { compatible = "fsl,qoriq-mc"; reg = <0x00000008 0x0c000000 0 0x40>, @@ -1333,91 +1567,109 @@ dpmacs { dpmac1: dpmac@1 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x1>; + pcs-handle = <&pcs1>; }; dpmac2: dpmac@2 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x2>; + pcs-handle = <&pcs2>; }; dpmac3: dpmac@3 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x3>; + pcs-handle = <&pcs3>; }; dpmac4: dpmac@4 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x4>; + pcs-handle = <&pcs4>; }; dpmac5: dpmac@5 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x5>; + pcs-handle = <&pcs5>; }; dpmac6: dpmac@6 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x6>; + pcs-handle = <&pcs6>; }; dpmac7: dpmac@7 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x7>; + pcs-handle = <&pcs7>; }; dpmac8: dpmac@8 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x8>; + pcs-handle = <&pcs8>; }; dpmac9: dpmac@9 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x9>; + pcs-handle = <&pcs9>; }; dpmac10: dpmac@a { compatible = "fsl,qoriq-mc-dpmac"; reg = <0xa>; + pcs-handle = <&pcs10>; }; dpmac11: dpmac@b { compatible = "fsl,qoriq-mc-dpmac"; reg = <0xb>; + pcs-handle = <&pcs11>; }; dpmac12: dpmac@c { compatible = "fsl,qoriq-mc-dpmac"; reg = <0xc>; + pcs-handle = <&pcs12>; }; dpmac13: dpmac@d { compatible = "fsl,qoriq-mc-dpmac"; reg = <0xd>; + pcs-handle = <&pcs13>; }; dpmac14: dpmac@e { compatible = "fsl,qoriq-mc-dpmac"; reg = <0xe>; + pcs-handle = <&pcs14>; }; dpmac15: dpmac@f { compatible = "fsl,qoriq-mc-dpmac"; reg = <0xf>; + pcs-handle = <&pcs15>; }; dpmac16: dpmac@10 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x10>; + pcs-handle = <&pcs16>; }; dpmac17: dpmac@11 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x11>; + pcs-handle = <&pcs17>; }; dpmac18: dpmac@12 { compatible = "fsl,qoriq-mc-dpmac"; reg = <0x12>; + pcs-handle = <&pcs18>; }; }; }; -- 2.25.1