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[23.128.96.18]) by mx.google.com with ESMTP id v5si1574386ejg.609.2020.09.25.06.37.23; Fri, 25 Sep 2020 06:37:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728872AbgIYNd7 (ORCPT + 99 others); Fri, 25 Sep 2020 09:33:59 -0400 Received: from inva021.nxp.com ([92.121.34.21]:34640 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726368AbgIYNd7 (ORCPT ); Fri, 25 Sep 2020 09:33:59 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E84DF2005E7; Fri, 25 Sep 2020 15:25:07 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id DC6AD200152; Fri, 25 Sep 2020 15:25:07 +0200 (CEST) Received: from fsr-ub1864-126.ea.freescale.net (fsr-ub1864-126.ea.freescale.net [10.171.82.212]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id A78DC2030E; Fri, 25 Sep 2020 15:25:07 +0200 (CEST) From: Ioana Ciornei To: shawnguo@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ioana Ciornei Subject: [PATCH 3/9] arm64: dts: ls1088ardb: add necessary DTS nodes for DPMAC2 Date: Fri, 25 Sep 2020 16:24:57 +0300 Message-Id: <20200925132503.30206-4-ioana.ciornei@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200925132503.30206-1-ioana.ciornei@nxp.com> References: <20200925132503.30206-1-ioana.ciornei@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Annotate the external MDIO2 node and describe the 10GBASER PHY found on the LS1088ARDB board and add a phy-handle for DPMAC2 to link it. Also, add the internal PCS MDIO node for the internal MDIO buses found on the LS1088A SoC along with its internal PCS PHY and link the corresponding DPMAC to the PCS through the pcs-handle. Signed-off-by: Ioana Ciornei --- .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 19 +++++++++++++++++++ .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 13 +++++++++++++ 2 files changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts index d7886b084f7f..661898064f0c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts @@ -17,6 +17,12 @@ / { compatible = "fsl,ls1088a-rdb", "fsl,ls1088a"; }; +&dpmac2 { + phy-handle = <&mdio2_aquantia_phy>; + phy-connection-type = "10gbase-r"; + pcs-handle = <&pcs2>; +}; + &dpmac3 { phy-handle = <&mdio1_phy5>; phy-connection-type = "qsgmii"; @@ -109,6 +115,15 @@ mdio1_phy8: emdio1_phy@8 { }; }; +&emdio2 { + status = "okay"; + + mdio2_aquantia_phy: emdio2_aquantia@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x0>; + }; +}; + &i2c0 { status = "okay"; @@ -179,6 +194,10 @@ &esdhc { status = "okay"; }; +&pcs_mdio2 { + status = "okay"; +}; + &pcs_mdio3 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index ad8679e58f9a..837d53472000 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -672,6 +672,19 @@ emdio2: mdio@0x8B97000 { status = "disabled"; }; + pcs_mdio2: mdio@8c0b000 { + compatible = "fsl,fman-memac-mdio"; + reg = <0x0 0x8c0b000 0x0 0x1000>; + little-endian; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + pcs2: pcs-phy@0 { + reg = <0>; + }; + }; + pcs_mdio3: mdio@8c0f000 { compatible = "fsl,fman-memac-mdio"; reg = <0x0 0x8c0f000 0x0 0x1000>; -- 2.25.1