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Peter Anvin" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Sean Christopherson , Yu Wang , Reinette Chatre , Yakui Zhao , Dave Hansen , Dan Williams , Fengwei Yin , Zhi Wang , Zhenyu Wang Subject: Re: [PATCH v4 04/17] x86/acrn: Introduce hypercall interfaces Message-ID: <20200927105314.GH88650@kroah.com> References: <20200922114311.38804-1-shuo.a.liu@intel.com> <20200922114311.38804-5-shuo.a.liu@intel.com> <20200927105152.GG88650@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200927105152.GG88650@kroah.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Sep 27, 2020 at 12:51:52PM +0200, Greg Kroah-Hartman wrote: > On Tue, Sep 22, 2020 at 07:42:58PM +0800, shuo.a.liu@intel.com wrote: > > From: Shuo Liu > > > > The Service VM communicates with the hypervisor via conventional > > hypercalls. VMCALL instruction is used to make the hypercalls. > > > > ACRN hypercall ABI: > > * Hypercall number is in R8 register. > > * Up to 2 parameters are in RDI and RSI registers. > > * Return value is in RAX register. > > > > Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8 > > register as direct register constraints, here are two ways to use R8 in > > extended asm: > > 1) use explicit register variable as input > > 2) use supported constraint as input with a explicit MOV to R8 in > > beginning of asm > > > > The number of instructions of above two ways are same. > > Asm code from 1) > > 38: 41 b8 00 00 00 80 mov $0x80000000,%r8d > > 3e: 48 89 c7 mov %rax,%rdi > > 41: 0f 01 c1 vmcall > > Here, writes to the lower dword (%r8d) clear the upper dword of %r8 when > > the CPU is in 64-bit mode. > > > > Asm code from 2) > > 38: 48 89 c7 mov %rax,%rdi > > 3b: 49 b8 00 00 00 80 00 movabs $0x80000000,%r8 > > 42: 00 00 00 > > 45: 0f 01 c1 vmcall > > > > Choose 1) for code simplicity and a little bit of code size > > optimization. > > > > Originally-by: Yakui Zhao > > Signed-off-by: Shuo Liu > > Reviewed-by: Reinette Chatre > > Cc: Dave Hansen > > Cc: Sean Christopherson > > Cc: Dan Williams > > Cc: Fengwei Yin > > Cc: Zhi Wang > > Cc: Zhenyu Wang > > Cc: Yu Wang > > Cc: Reinette Chatre > > Cc: Greg Kroah-Hartman > > --- > > arch/x86/include/asm/acrn.h | 57 +++++++++++++++++++++++++++++++++++++ > > 1 file changed, 57 insertions(+) > > > > diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h > > index a2d4aea3a80d..23a93b87edeb 100644 > > --- a/arch/x86/include/asm/acrn.h > > +++ b/arch/x86/include/asm/acrn.h > > @@ -14,4 +14,61 @@ void acrn_setup_intr_handler(void (*handler)(void)); > > void acrn_remove_intr_handler(void); > > bool acrn_is_privileged_vm(void); > > > > +/* > > + * Hypercalls for ACRN > > + * > > + * - VMCALL instruction is used to implement ACRN hypercalls. > > + * - ACRN hypercall ABI: > > + * - Hypercall number is passed in R8 register. > > + * - Up to 2 arguments are passed in RDI, RSI. > > + * - Return value will be placed in RAX. > > + */ > > +static inline long acrn_hypercall0(unsigned long hcall_id) > > +{ > > + register long r8 asm("r8"); > > + long result; > > + > > + /* Nothing can come between the r8 assignment and the asm: */ > > + r8 = hcall_id; > > + asm volatile("vmcall\n\t" > > + : "=a" (result) > > + : "r" (r8) > > + : ); > > What keeps an interrupt from happening between the r8 assignment and the > asm: ? > > Is this something that most hypercalls need to handle? I don't see > other ones needing this type of thing, is it just because of how these > are defined? Ah, the changelog above explains this. You should put that in the code itself, as a comment, otherwise we will not know this at all in 5 years, when gcc is changed to allow r8 access :) thanks, greg k-h