Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp3445812pxk; Mon, 28 Sep 2020 18:45:53 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzMDDKEkKn98FIIBuNvN+uxQSAHNCmEvJbu3S3slh2wlDZYb1Y6OZZpGRpZCX36IyNvH8yq X-Received: by 2002:a50:cf0b:: with SMTP id c11mr787584edk.87.1601343952797; Mon, 28 Sep 2020 18:45:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601343952; cv=none; d=google.com; s=arc-20160816; b=HvHeoHkQQQ3d8qBg+eGcsW9UiE2HGY21QqucWQtruk5dZpQGzKkdj3GywaoTiyJ08Q ioD5aP7UnUO4Um7vCYOLJgZ+dpZe0881ZgoWPc6nDJ9H31zCyH+vWbrQZxZGS68ofoDZ GK1aXm4upTuapLNtanj3pY+Jd46hP1EirQj8DYKdymeKDgUp1Wlp6TrjO8LfoUqY5n7p bSVf2aIpGpPGpUoczRkDbQuMMdka9MJOkt9eqakhKjh6apzsIYBzYFYN0rpv0Sf63mlD T6tLlL/sKoilIUDodYhZ9h5g7UIsHyVPmTEIQjRIwgBACl6OJtCDenT7OF5ttzeX1pfm zRow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:from:subject:cc:to:message-id:date; bh=ty3kYTQ/6MzQCUFbyfN1uw0jXZuLKLX41nnJAByFHhY=; b=XH5TS+h5lWOurkjDnWFE9SFnFLnowKtpmldkkf4cm/rgptDn64YmcjGlateAFa9qkv nJCXtN9r32b1wF9dtw32YBWVZTEPjo2lr1B7HG4fp+8j8rBcIMvXnXpS9rqPnIG+JvIk gKJVfCasDrrlFgGWk1kF9JWatesFQq8xakSN8EXZUUKQsGKMDU+3qQMd7HR62P06TeLh SPXWr/esYogfcA8ZC2vIGfdqSbJzzqpMjf/omTy9gEhcnlv1myQKj1KYUS3+Hw1MmC6d 3kfnLuaq3x6a/J8BaZO8T4uuA7g/gzO5lVKEUTpfRWLFBrtiELcJNLuMqc7ctgpdsqYj rkRw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q26si1753900eji.610.2020.09.28.18.45.23; Mon, 28 Sep 2020 18:45:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727381AbgI2BoN (ORCPT + 99 others); Mon, 28 Sep 2020 21:44:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727084AbgI2BoN (ORCPT ); Mon, 28 Sep 2020 21:44:13 -0400 Received: from shards.monkeyblade.net (shards.monkeyblade.net [IPv6:2620:137:e000::1:9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86856C061755; Mon, 28 Sep 2020 18:44:13 -0700 (PDT) Received: from localhost (unknown [IPv6:2601:601:9f00:477::3d5]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) (Authenticated sender: davem-davemloft) by shards.monkeyblade.net (Postfix) with ESMTPSA id 5AAEA127A2A4D; Mon, 28 Sep 2020 18:27:25 -0700 (PDT) Date: Mon, 28 Sep 2020 18:44:12 -0700 (PDT) Message-Id: <20200928.184412.1736634531612097860.davem@davemloft.net> To: weifeng.voon@intel.com Cc: mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, joabreu@synopsys.com, peppe.cavallaro@st.com, andrew@lunn.ch, alexandre.torgue@st.com, boon.leong.ong@intel.com, chen.yong.seow@intel.com, mgross@linux.intel.com, vee.khee.wong@intel.com Subject: Re: [PATCH v1 net-next] stmmac: intel: Adding ref clock 1us tic for LPI cntr From: David Miller In-Reply-To: <20200928101212.12274-1-weifeng.voon@intel.com> References: <20200928101212.12274-1-weifeng.voon@intel.com> X-Mailer: Mew version 6.8 on Emacs 27.1 Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.5.12 (shards.monkeyblade.net [2620:137:e000::1:9]); Mon, 28 Sep 2020 18:27:25 -0700 (PDT) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Voon Weifeng Date: Mon, 28 Sep 2020 18:12:12 +0800 > From: Rusaimi Amira Ruslan > > Adding reference clock (1us tic) for all LPI timer on Intel platforms. > The reference clock is derived from ptp clk. This also enables all LPI > counter. > > Signed-off-by: Rusaimi Amira Ruslan > Signed-off-by: Voon Weifeng Applied.