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Date:   Mon, 28 Sep 2020 22:12:45 -0700
From:   Sean Christopherson <sean.j.christopherson@intel.com>
To:     Maxim Levitsky <mlevitsk@redhat.com>
Cc:     kvm@vger.kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        Vitaly Kuznetsov <vkuznets@redhat.com>,
        Joerg Roedel <joro@8bytes.org>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Wanpeng Li <wanpengli@tencent.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        linux-kernel@vger.kernel.org, Jim Mattson <jmattson@google.com>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@kernel.org>
Subject: Re: [PATCH v6 3/4] KVM: x86: allow kvm_x86_ops.set_efer to return an
 error value
Message-ID: <20200929051245.GC353@linux.intel.com>
References: <20200922211025.175547-1-mlevitsk@redhat.com>
 <20200922211025.175547-4-mlevitsk@redhat.com>
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On Wed, Sep 23, 2020 at 12:10:24AM +0300, Maxim Levitsky wrote:
> This will be used to signal an error to the userspace, in case
> the vendor code failed during handling of this msr. (e.g -ENOMEM)
> 
> Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
> ---
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index e4b07be450d4e..df53baa0059fe 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -1456,6 +1456,7 @@ static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  {
>  	u64 old_efer = vcpu->arch.efer;
>  	u64 efer = msr_info->data;
> +	int r;
>  
>  	if (efer & efer_reserved_bits)
>  		return 1;
> @@ -1472,7 +1473,12 @@ static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  	efer &= ~EFER_LMA;
>  	efer |= vcpu->arch.efer & EFER_LMA;
>  
> -	kvm_x86_ops.set_efer(vcpu, efer);
> +	r = kvm_x86_ops.set_efer(vcpu, efer);
> +

Nit: IMO, omitting the newline would help the reader make a direct connection
between setting 'r' and checking 'r'.

> +	if (r) {
> +		WARN_ON(r > 0);
> +		return r;
> +	}
>  
>  	/* Update reserved bits */
>  	if ((efer ^ old_efer) & EFER_NX)
> -- 
> 2.26.2
>