Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Subject: Re: [PATCH v2 devicetree 2/2] powerpc: dts: t1040rdb: add ports for
 Seville Ethernet switch
To:     Vladimir Oltean <vladimir.oltean@nxp.com>, robh+dt@kernel.org,
        shawnguo@kernel.org, mpe@ellerman.id.au, devicetree@vger.kernel.org
Cc:     benh@kernel.crashing.org, paulus@samba.org,
        linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
        netdev@vger.kernel.org, madalin.bucur@oss.nxp.com,
        radu-andrei.bulie@nxp.com, Vladimir Oltean <olteanv@gmail.com>
References: <20200929113209.3767787-1-vladimir.oltean@nxp.com>
 <20200929113209.3767787-3-vladimir.oltean@nxp.com>
From:   Maxim Kochetkov <fido_max@inbox.ru>
Message-ID: <87dab445-d65c-c58b-86e1-4b99b8371aeb@inbox.ru>
Date:   Tue, 29 Sep 2020 16:12:15 +0300
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
 Thunderbird/78.3.1
MIME-Version: 1.0
In-Reply-To: <20200929113209.3767787-3-vladimir.oltean@nxp.com>
Content-Type: text/plain; charset=utf-8; format=flowed
Content-Language: en-US
Content-Transfer-Encoding: 8bit
Precedence: bulk

Reviewed-by: Maxim Kochetkov <fido_max@inbox.ru>


29.09.2020 14:32, Vladimir Oltean пишет:
> From: Vladimir Oltean <olteanv@gmail.com>
> 
> Define the network interface names for the switch ports and hook them up
> to the 2 QSGMII PHYs that are onboard.
> 
> A conscious decision was taken to go along with the numbers that are
> written on the front panel of the board and not with the hardware
> numbers of the switch chip ports. The 2 numbering schemes are
> shifted by 8.
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
> Changes in v2:
> Use the existing way of accessing the mdio bus and not labels.
> 
>   arch/powerpc/boot/dts/fsl/t1040rdb.dts | 115 +++++++++++++++++++++++++
>   1 file changed, 115 insertions(+)
> 
> diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb.dts b/arch/powerpc/boot/dts/fsl/t1040rdb.dts
> index 65ff34c49025..3fd08a2b6dcb 100644
> --- a/arch/powerpc/boot/dts/fsl/t1040rdb.dts
> +++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts
> @@ -64,6 +64,40 @@ mdio@fc000 {
>   				phy_sgmii_2: ethernet-phy@3 {
>   					reg = <0x03>;
>   				};
> +
> +				/* VSC8514 QSGMII PHY */
> +				phy_qsgmii_0: ethernet-phy@4 {
> +					reg = <0x4>;
> +				};
> +
> +				phy_qsgmii_1: ethernet-phy@5 {
> +					reg = <0x5>;
> +				};
> +
> +				phy_qsgmii_2: ethernet-phy@6 {
> +					reg = <0x6>;
> +				};
> +
> +				phy_qsgmii_3: ethernet-phy@7 {
> +					reg = <0x7>;
> +				};
> +
> +				/* VSC8514 QSGMII PHY */
> +				phy_qsgmii_4: ethernet-phy@8 {
> +					reg = <0x8>;
> +				};
> +
> +				phy_qsgmii_5: ethernet-phy@9 {
> +					reg = <0x9>;
> +				};
> +
> +				phy_qsgmii_6: ethernet-phy@a {
> +					reg = <0xa>;
> +				};
> +
> +				phy_qsgmii_7: ethernet-phy@b {
> +					reg = <0xb>;
> +				};
>   			};
>   		};
>   	};
> @@ -76,3 +110,84 @@ cpld@3,0 {
>   };
>   
>   #include "t1040si-post.dtsi"
> +
> +&seville_switch {
> +	status = "okay";
> +};
> +
> +&seville_port0 {
> +	managed = "in-band-status";
> +	phy-handle = <&phy_qsgmii_0>;
> +	phy-mode = "qsgmii";
> +	/* ETH4 written on chassis */
> +	label = "swp4";
> +	status = "okay";
> +};
> +
> +&seville_port1 {
> +	managed = "in-band-status";
> +	phy-handle = <&phy_qsgmii_1>;
> +	phy-mode = "qsgmii";
> +	/* ETH5 written on chassis */
> +	label = "swp5";
> +	status = "okay";
> +};
> +
> +&seville_port2 {
> +	managed = "in-band-status";
> +	phy-handle = <&phy_qsgmii_2>;
> +	phy-mode = "qsgmii";
> +	/* ETH6 written on chassis */
> +	label = "swp6";
> +	status = "okay";
> +};
> +
> +&seville_port3 {
> +	managed = "in-band-status";
> +	phy-handle = <&phy_qsgmii_3>;
> +	phy-mode = "qsgmii";
> +	/* ETH7 written on chassis */
> +	label = "swp7";
> +	status = "okay";
> +};
> +
> +&seville_port4 {
> +	managed = "in-band-status";
> +	phy-handle = <&phy_qsgmii_4>;
> +	phy-mode = "qsgmii";
> +	/* ETH8 written on chassis */
> +	label = "swp8";
> +	status = "okay";
> +};
> +
> +&seville_port5 {
> +	managed = "in-band-status";
> +	phy-handle = <&phy_qsgmii_5>;
> +	phy-mode = "qsgmii";
> +	/* ETH9 written on chassis */
> +	label = "swp9";
> +	status = "okay";
> +};
> +
> +&seville_port6 {
> +	managed = "in-band-status";
> +	phy-handle = <&phy_qsgmii_6>;
> +	phy-mode = "qsgmii";
> +	/* ETH10 written on chassis */
> +	label = "swp10";
> +	status = "okay";
> +};
> +
> +&seville_port7 {
> +	managed = "in-band-status";
> +	phy-handle = <&phy_qsgmii_7>;
> +	phy-mode = "qsgmii";
> +	/* ETH11 written on chassis */
> +	label = "swp11";
> +	status = "okay";
> +};
> +
> +&seville_port8 {
> +	ethernet = <&enet0>;
> +	status = "okay";
> +};
>