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[109.252.170.211]) by smtp.googlemail.com with ESMTPSA id l3sm243635lfc.34.2020.09.30.09.25.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Sep 2020 09:25:42 -0700 (PDT) Subject: Re: [PATCH v3 2/3] iommu/tegra-smmu: Rework .probe_device and .attach_dev To: Thierry Reding Cc: Nicolin Chen , joro@8bytes.org, krzk@kernel.org, vdumpa@nvidia.com, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org References: <20200930084258.25493-1-nicoleotsuka@gmail.com> <20200930084258.25493-3-nicoleotsuka@gmail.com> <20200930153131.GB3833404@ulmo> <20200930160626.GD3833404@ulmo> From: Dmitry Osipenko Message-ID: Date: Wed, 30 Sep 2020 19:25:41 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200930160626.GD3833404@ulmo> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 30.09.2020 19:06, Thierry Reding пишет: > On Wed, Sep 30, 2020 at 06:36:52PM +0300, Dmitry Osipenko wrote: >> I'... >>>> + struct tegra_mc *mc = devm_tegra_get_memory_controller(dev); >>>> + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); >>> >>> It looks to me like the only reason why you need this new global API is >>> because PCI devices may not have a device tree node with a phandle to >>> the IOMMU. However, SMMU support for PCI will only be enabled if the >>> root complex has an iommus property, right? In that case, can't we >>> simply do something like this: >>> >>> if (dev_is_pci(dev)) >>> np = find_host_bridge(dev)->of_node; >>> else >>> np = dev->of_node; >>> >>> ? I'm not sure exactly what find_host_bridge() is called, but I'm pretty >>> sure that exists. >>> >>> Once we have that we can still iterate over the iommus property and do >>> not need to rely on this global variable. >> >> This sounds more complicated than the current variant. >> >> Secondly, I'm already about to use the new tegra_get_memory_controller() >> API for all the T20/30/124/210 EMC and devfreq drivers. > > Why do we need it there? They seem to work fine without it right now. All the Tegra30/124/210 EMC drivers are already duplicating that MC lookup code and only the recent T210 driver does it properly. > If it is required for new functionality, we can always make the dependent > on a DT reference via phandle without breaking any existing code. That's correct, it will be also needed for the new functionality as well, hence even more drivers will need to perform the MC lookup. I don't quite understand why you're asking for the phandle reference, it's absolutely not needed for the MC lookup and won't work for the older DTs if DT change will be needed. Please give a detailed explanation.