Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp583393pxk; Thu, 1 Oct 2020 09:21:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxXIAhMHqN26G8sdaYMXWoyEjshLr1i0GF7EuE3VZqmNlWnng85BJ+UBn+GhaulB/xEJPXp X-Received: by 2002:a17:906:868c:: with SMTP id g12mr8371741ejx.230.1601569305375; Thu, 01 Oct 2020 09:21:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601569305; cv=none; d=google.com; s=arc-20160816; b=xVS8SeOcNF6oqi6eD0Cun26MnVTcVO6cyyTjhHiCbproEsTD4JVIrDcQZ44UM4FA7x vhhYf+bZg9JEIRPa2YhFyqBqO0KLRhNSyyXgHMY+TPJ+S8NHgawiuGxfPY77HC1k2mm2 MBV7ek/RGdtGCxzGTrDWxqtvVf4Z40XF2+vml/r0FgBfOQIXFzhe/IlVB4E8P0RLvZTN tvH4Mpt5wxECf4oHC5LeRudS/ux1bdSIpLCpNh21Iu+zcN/k9QsNO37WnFO4NNJBMgHp si27s9vf4RnvpOMAdHEz5k7ZMfrT2cfkDlfMwjfKoSFH5AIJQ90THbiFvn37vSptfLmD xnFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=3LAmJg9WnIt2324PYJL3Lh9Cm78yyw32qACaC1Y17AM=; b=IE9i+nykDM9Y3zOMr6Mm5tVgQtQ9OSBFjvF6MQe8KvSe2E2AZu7JxIDXG1Cfcg0xnJ FnGUxCTAPl5FHX8+gGeS+Ul4aEoofmx36gus5eHYv1uaHBfIOPb8F/eUoSIDFjNnMXjz +s9U/L4fI+oZaE9WRauZJuUVCgN/vmKqIPl2MC7Efmldd6GIDPzyj6oCV3M1jilaStdm zp3ByuT1nyEuUrFj4KTYVTYvT9dc3wMOUU9Hgq9gF8qi+YxxbaRLvn+RlNg3DgJv9QHg gdfUHKHhuaIsqlGiDOE+aXsTAtnBgeI5QOiWhOtt+cNG0PVCI2BFyijNa3Fvfd+1gRQh bctA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id gs17si4066099ejb.309.2020.10.01.09.21.22; Thu, 01 Oct 2020 09:21:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732801AbgJAQSH (ORCPT + 99 others); Thu, 1 Oct 2020 12:18:07 -0400 Received: from mx2.suse.de ([195.135.220.15]:57888 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732026AbgJAQR6 (ORCPT ); Thu, 1 Oct 2020 12:17:58 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id DD042AF26; Thu, 1 Oct 2020 16:17:56 +0000 (UTC) From: Nicolas Saenz Julienne To: robh+dt@kernel.org, catalin.marinas@arm.com, hch@lst.de, robin.murphy@arm.com, devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, Nicolas Saenz Julienne Subject: [PATCH 3/4] arm64: Default to 32-bit ZONE_DMA Date: Thu, 1 Oct 2020 18:17:39 +0200 Message-Id: <20201001161740.29064-4-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201001161740.29064-1-nsaenzjulienne@suse.de> References: <20201001161740.29064-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Raspberry Pi 4 needs two DMA zones as some of its devices can only DMA into the 30-bit physical address space. We solved that by creating an extra ZONE_DMA covering the 30-bit. It turns out that creating extra zones unnecessarily broke Kdump on large systems. So default to a single 32-bit wide ZONE_DMA and only define both zones if running on RPi4. Signed-off-by: Nicolas Saenz Julienne --- arch/arm64/mm/init.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index e1a69a618832..3c3f462466eb 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -43,8 +43,6 @@ #include #include -#define ARM64_ZONE_DMA_BITS 30 - /* * We need to be able to catch inadvertent references to memstart_addr * that occur (potentially in generic code) before arm64_memblock_init() @@ -388,8 +386,14 @@ void __init arm64_memblock_init(void) early_init_fdt_scan_reserved_mem(); if (IS_ENABLED(CONFIG_ZONE_DMA)) { - zone_dma_bits = ARM64_ZONE_DMA_BITS; - arm64_dma_phys_limit = max_zone_phys(ARM64_ZONE_DMA_BITS); + /* + * early_init_dt_scan() might alter zone_dma_bits based on the + * device's DT. Otherwise, have it cover the 32-bit address + * space. + */ + if (zone_dma_bits == ZONE_DMA_BITS_DEFAULT) + zone_dma_bits = 32; + arm64_dma_phys_limit = max_zone_phys(zone_dma_bits); } if (IS_ENABLED(CONFIG_ZONE_DMA32)) -- 2.28.0