Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp644946pxk; Thu, 1 Oct 2020 10:22:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxe/0Z+ZzwReGqbLc7RD/96cOEzHNyt3VToSDYIfkvmOzsE1t/wTXIgeJB/um4vw191n/4I X-Received: by 2002:a17:906:2752:: with SMTP id a18mr9010702ejd.350.1601572979538; Thu, 01 Oct 2020 10:22:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601572979; cv=none; d=google.com; s=arc-20160816; b=IRN7Ix8OT+6L7WJ/OHSDlRwweQX1DE/rXni/pCEfKFUFgVTLVFMSBQewmXWcHq5P3Z TFqCBZ1hbBjmE76Po3rKF1UdpoO8T33O1pr6LmyJgZcPqxbLAREDuRMcy0APjgsRF/BV Vu/WvjBiHEU4Fv8Mj8sKu0I0AzE2rg8gaDPJwPSmgY8fvzM5pJzfyfNkT/4K100Vwj2O OXYlQWuHNuWaVYQEWkbFt37O6cPB+YOb8YKPaACoIogcu0ZJ7irnYgSmyc2En8SQrnsi P4CcyBhQJkinhDzks8d+1AVrrARXBZ9DP+OFOUO4OcG11A1/Ee508nQb9dyZoTzJSB9g h38g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=c/2DaKVVxPw5bUn5R98106EExUtr9Fs0G4oEmRtNgj4=; b=qMT4u0BGU3wYh4Nc4M4MxtephpgZsuONCIabWJEkZ6ixA0myiNxpXAM25r4hSULtQZ KjkMDG4AaehXcdj5T99XyvUWySJ9hRrboWzIqdX8efUPrasY706ZIC29FL96IVWgf5bk qsv/q9DZtII0LPiiFAHsXviTEz+EAVhni4VmTqUJwVvjLaosRmWAIRmYdihLM2YKXIiD utl8MMk2Fz2ssQYi2X6VwDAQ/yJ2WzGfG4VhALtYy67QzGIR9GJ2yCP4HL64RgYgN/q+ zES5x6ybZhzEr5ybl3Y74zxgG0r/pMZP3AFf9k0aHA4ZcK0CqZ1xlJL8Or9cqu+uxAWS jKAQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p11si3885146ejc.160.2020.10.01.10.22.36; Thu, 01 Oct 2020 10:22:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732737AbgJART1 (ORCPT + 99 others); Thu, 1 Oct 2020 13:19:27 -0400 Received: from mail.kernel.org ([198.145.29.99]:49304 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732213AbgJART1 (ORCPT ); Thu, 1 Oct 2020 13:19:27 -0400 Received: from gaia (unknown [31.124.44.166]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 069D92085B; Thu, 1 Oct 2020 17:19:24 +0000 (UTC) Date: Thu, 1 Oct 2020 18:19:22 +0100 From: Catalin Marinas To: Nicolas Saenz Julienne Cc: robh+dt@kernel.org, hch@lst.de, robin.murphy@arm.com, devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, will@kernel.org, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org Subject: Re: [PATCH 3/4] arm64: Default to 32-bit ZONE_DMA Message-ID: <20201001171922.GO21544@gaia> References: <20201001161740.29064-1-nsaenzjulienne@suse.de> <20201001161740.29064-4-nsaenzjulienne@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201001161740.29064-4-nsaenzjulienne@suse.de> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 01, 2020 at 06:17:39PM +0200, Nicolas Saenz Julienne wrote: > diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c > index e1a69a618832..3c3f462466eb 100644 > --- a/arch/arm64/mm/init.c > +++ b/arch/arm64/mm/init.c > @@ -43,8 +43,6 @@ > #include > #include > > -#define ARM64_ZONE_DMA_BITS 30 > - > /* > * We need to be able to catch inadvertent references to memstart_addr > * that occur (potentially in generic code) before arm64_memblock_init() > @@ -388,8 +386,14 @@ void __init arm64_memblock_init(void) > early_init_fdt_scan_reserved_mem(); > > if (IS_ENABLED(CONFIG_ZONE_DMA)) { > - zone_dma_bits = ARM64_ZONE_DMA_BITS; > - arm64_dma_phys_limit = max_zone_phys(ARM64_ZONE_DMA_BITS); > + /* > + * early_init_dt_scan() might alter zone_dma_bits based on the > + * device's DT. Otherwise, have it cover the 32-bit address > + * space. > + */ > + if (zone_dma_bits == ZONE_DMA_BITS_DEFAULT) > + zone_dma_bits = 32; > + arm64_dma_phys_limit = max_zone_phys(zone_dma_bits); So here we assume that if zone_dma_bits is 24, it wasn't initialised. I think it may be simpler if we just set it in setup_machine_fdt() to 32 or 30 if RPi4. This way we don't have to depend on what the core kernel sets. -- Catalin