Received: by 2002:a05:6a10:22f:0:0:0:0 with SMTP id 15csp761867pxk; Thu, 1 Oct 2020 13:11:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyKHnDhJG1w2bDXlWDYni0p32kDY5Awb2+0NbxXUFWPSPuAL67VnF3Gymf7uQEQjDyKEVbb X-Received: by 2002:a05:6402:1859:: with SMTP id v25mr10274506edy.118.1601583089923; Thu, 01 Oct 2020 13:11:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601583089; cv=none; d=google.com; s=arc-20160816; b=UL3BG9GNZ2Q91OEyDj0i1Gu+dfn+1ASn0tupk432d8WnZgW/cOOeG2FguXllJuSlcC 6KMMvF5zV/oi0qWsbnodHo+iGXBogEgdrpNCvzpX/nvlg7nc71v9OZEG6HMBqmcLNNG/ HdKEZ9N4XU4dC0m/yMhjcwWK9Pnfbox+IP/CP2SweJSNejuASoGWLw4Cc1maFZr/VDuu +sC4xxrlWCF6zlYLM29UpD1b5SxPU/rDC9c6a4uZwV0l+slcOQ9xAsvN5vSD4qWbKOEr UR8lVq0xBYvPLSsHRW4A202qcaoq1X42xlW0rPI2LJ4mBs2dMCDgSxpJzWFcQs/FcRbw 7Whg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:from:subject:cc:to:message-id:date; bh=gcRMWR/CsJgqT9ZIVKJwrs7zEZFz8hHE0fItYKSLJxU=; b=JsllnOCrccg08z/NRmiOguYttLvYZkRALHOktDkCB5KObBAp9fjBc/OcOYxccKvx51 v7RajEYZYdmkJRHCRlPUrACdAiqX8slDm2iurGG0MoF+BGI4L1qpjMGMejK5ELSFd3MG tGoNXiJ51/yF6tBubt4eQ4gknRjxWn513XOp4ovFreuXlCUme9lMPAVk+8hKoKx3LDSV 64qKj9+RQip+AMDRFbLpANbISGDfGNMgIJhJCsQeaDFE27uZbdglhcpD1ZzgmvN6BmKW ydM245i9eG5/HwifzwTLNuVIu1aX2ImRhrlrkcNw5hCV5EQh2t5tp1wdwvmvrTaq8CdK L+hA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p1si4300721ejd.570.2020.10.01.13.11.05; Thu, 01 Oct 2020 13:11:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732755AbgJAUKI (ORCPT + 99 others); Thu, 1 Oct 2020 16:10:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726606AbgJAUKH (ORCPT ); Thu, 1 Oct 2020 16:10:07 -0400 Received: from shards.monkeyblade.net (shards.monkeyblade.net [IPv6:2620:137:e000::1:9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BEF34C0613D0; Thu, 1 Oct 2020 13:10:07 -0700 (PDT) Received: from localhost (unknown [IPv6:2601:601:9f00:477::3d5]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) (Authenticated sender: davem-davemloft) by shards.monkeyblade.net (Postfix) with ESMTPSA id C3252148489AD; Thu, 1 Oct 2020 12:53:18 -0700 (PDT) Date: Thu, 01 Oct 2020 13:10:05 -0700 (PDT) Message-Id: <20201001.131005.812058315852168053.davem@davemloft.net> To: vladimir.oltean@nxp.com Cc: robh+dt@kernel.org, shawnguo@kernel.org, mpe@ellerman.id.au, devicetree@vger.kernel.org, benh@kernel.crashing.org, paulus@samba.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, madalin.bucur@oss.nxp.com, radu-andrei.bulie@nxp.com, fido_max@inbox.ru, andrew@lunn.ch Subject: Re: [PATCH v3 devicetree 0/2] Add Seville Ethernet switch to T1040RDB From: David Miller In-Reply-To: <20201001132013.1866299-1-vladimir.oltean@nxp.com> References: <20201001132013.1866299-1-vladimir.oltean@nxp.com> X-Mailer: Mew version 6.8 on Emacs 27.1 Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.5.12 (shards.monkeyblade.net [2620:137:e000::1:9]); Thu, 01 Oct 2020 12:53:19 -0700 (PDT) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vladimir Oltean Date: Thu, 1 Oct 2020 16:20:11 +0300 > Seville is a DSA switch that is embedded inside the T1040 SoC, and > supported by the mscc_seville DSA driver inside drivers/net/dsa/ocelot. > > This series adds this switch to the SoC's dtsi files and to the T1040RDB > board file. I am assuming the devicetree folks will pick this series up. Thanks.