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Date:   Sat, 3 Oct 2020 01:36:30 +0200
From:   Jonathan =?utf-8?Q?Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
To:     Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
Cc:     Jonathan =?utf-8?Q?Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        Heiko Stuebner <heiko@sntech.de>, devicetree@vger.kernel.org,
        Linus Walleij <linus.walleij@linaro.org>,
        Thierry Reding <thierry.reding@gmail.com>,
        Sam Ravnborg <sam@ravnborg.org>, linux-rtc@vger.kernel.org,
        Arnd Bergmann <arnd@arndb.de>,
        Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
        Fabio Estevam <festevam@gmail.com>,
        Daniel Palmer <daniel@0x0f.com>,
        Andy Shevchenko <andy.shevchenko@gmail.com>,
        Andreas Kemnade <andreas@kemnade.info>,
        NXP Linux Team <linux-imx@nxp.com>,
        linux-pwm@vger.kernel.org, Stephan Gerhold <stephan@gerhold.net>,
        allen <allen.chen@ite.com.tw>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Lubomir Rintel <lkundrak@v3.sk>,
        Rob Herring <robh+dt@kernel.org>,
        Lee Jones <lee.jones@linaro.org>,
        linux-arm-kernel@lists.infradead.org,
        Alessandro Zummo <a.zummo@towertech.it>,
        linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Heiko Stuebner <heiko.stuebner@theobroma-systems.com>,
        Josua Mayer <josua.mayer@jm0.eu>,
        Shawn Guo <shawnguo@kernel.org>,
        "David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH v3 4/7] pwm: ntxec: Add driver for PWM function in
 Netronix EC
Message-ID: <20201002233630.GB500800@latitude>
References: <20200924192455.2484005-1-j.neuschaefer@gmx.net>
 <20200924192455.2484005-5-j.neuschaefer@gmx.net>
 <20200925063037.fcrmqvpe5noi3ef4@pengutronix.de>
 <20200927211044.GC2510@latitude>
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On Mon, Sep 28, 2020 at 10:35:46AM +0200, Uwe Kleine-K=C3=B6nig wrote:
> Hello Jonathan,
>=20
> On Sun, Sep 27, 2020 at 11:10:44PM +0200, Jonathan Neusch=C3=A4fer wrote:
[...]
> > > > +	if (state->enabled && duty !=3D 0) {
> > > > +		res =3D regmap_write(pwm->ec->regmap, NTXEC_REG_ENABLE, ntxec_re=
g8(1));
> > > > +		if (res)
> > > > +			return res;
> > > > +
> > > > +		/* Disable the auto-off timer */
> > > > +		res =3D regmap_write(pwm->ec->regmap, NTXEC_REG_AUTO_OFF_HI, ntx=
ec_reg8(0xff));
> > > > +		if (res)
> > > > +			return res;
> > > > +
> > > > +		return regmap_write(pwm->ec->regmap, NTXEC_REG_AUTO_OFF_LO, ntxe=
c_reg8(0xff));
> > > > +	} else {
> > > > +		return regmap_write(pwm->ec->regmap, NTXEC_REG_ENABLE, ntxec_reg=
8(0));
> > > > +	}
> > >=20
> > > This code is wrong for state->enabled =3D false.
> >=20
> > Why?
>=20
> Hm, I wonder the same. Probably I just misunderstood the code, sorry :-\
>=20
> > > How does the PWM behave when .apply is called? Does it complete the
> > > currently running period? Can it happen that when you switch from say
> > >=20
> > > 	.duty_cycle =3D 900 * TIME_BASE_NS (0x384)
> > > 	.period =3D 1800 * TIME_BASE_NS (0x708)
> > >=20
> > > to
> > >=20
> > > 	.duty_cycle =3D 300 * TIME_BASE_NS (0x12c)
> > > 	.period =3D 600 * TIME_BASE_NS (0x258)
> > >=20
> > > that a period with
> > >=20
> > > 	.duty_cycle =3D 388 * TIME_BASE_NS (0x184)
> > > 	.period =3D 1800 * TIME_BASE_NS (0x708)
> > > =09
> > > (because only NTXEC_REG_PERIOD_HIGH was written when the new period
> > > started) or something similar is emitted?
> >=20
> > Changes take effect after the low byte is written, so a result like 0x1=
84
> > in the above example should not happen.
> >=20
> > When the period and duty cycle are both changed, it temporarily results
> > in an inconsistent state:
> >=20
> >  - period =3D 1800ns, duty cycle =3D 900ns
> >  - period =3D  600ns, duty cycle =3D 900ns (!)
> >  - period =3D  600ns, duty cycle =3D 300ns
>=20
> Does this always happen, or only if a new cycle starts at an unlucky
> moment?

Just based on thinking about the code, the register writes setting this
intermediate state would always happen, but I don't know if the state
changes are applied in the middle of a running period, or when the new
period starts, because I can't measure the signal in good enough detail
at the moment.

> > The inconsistent state of duty cycle > period is handled gracefully by
> > the EC and it outputs a 100% duty cycle, as far as I can tell.
>=20
> OK.
>=20
> > I currently don't have a logic analyzer / oscilloscope to measure
> > whether we get full PWM periods, or some kind of glitch when the new
> > period starts in the middle of the last one.
>=20
> You can even check this with an LED using something like:
>=20
> 	pwm_apply(mypwm, {.enabled =3D true, .duty_cycle =3D $big, .period =3D $=
big});
> 	pwm_apply(mypwm, {.enabled =3D false, ... });
>=20
> . If the period is completed the LED is on for $big ns, if not the LED
> is on for a timespan that is probably hardly noticable with the human
> eye.

The longest configurable period is about 8ms, so it's not long enough to
see anything. However, after writing enable=3D0, it can take about a
second for the PWM signal to turn off... this hardware is a bit weird.

> > > > +}
> > > > +
> > > > +static struct pwm_ops ntxec_pwm_ops =3D {
> > > > +	.apply =3D ntxec_pwm_apply,
> > >=20
> > > Please implement a .get_state() callback. And enable PWM_DEBUG during
> > > your tests.
> >=20
> > The device doesn't support reading back the PWM state. What should a
> > driver do in this case?
>=20
> Document it as a limitation, please.

Okay.


Thanks,
Jonathan Neusch=C3=A4fer

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