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Wed, 7 Oct 2020 11:07:37 +0000 Date: Wed, 7 Oct 2020 12:07:36 +0100 From: Matteo Franchin To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Cc: airlied@linux.ie, liviu.dudau@arm.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, tzimmermann@suse.de, nd@arm.com Subject: Re: [PATCH] drm/fourcc: Add AXBXGXRX106106106106 format Message-ID: <20201007110736.GA13842@lagrange> References: <20201007092725.13300-1-matteo.franchin@arm.com> <20201007103539.GA6112@intel.com> Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20201007103539.GA6112@intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [217.140.106.49] X-ClientProxiedBy: LO2P265CA0406.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:f::34) To AM6PR08MB3653.eurprd08.prod.outlook.com (2603:10a6:20b:4c::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost (217.140.106.49) by LO2P265CA0406.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:f::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3455.22 via Frontend Transport; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Oct 2020 11:07:43.9004 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e2069559-2108-4dd1-c041-08d86ab13720 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT058.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0802MB2363 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ville, On Wed, Oct 07, 2020 at 01:35:39PM +0300, Ville Syrj�l� wrote: > On Wed, Oct 07, 2020 at 10:27:25AM +0100, Matteo Franchin wrote: > > Add ABGR format with 10-bit components packed in 64-bit per pixel. > > This format can be used to handle > > VK_FORMAT_R10X6G10X6B10X6A10X6_UNORM_4PACK16 on little-endian > > architectures. > > > > Signed-off-by: Matteo Franchin > > --- > > drivers/gpu/drm/drm_fourcc.c | 1 + > > include/uapi/drm/drm_fourcc.h | 7 +++++++ > > 2 files changed, 8 insertions(+) > > > > diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c > > index 722c7ebe4e88..bba03fcb016d 100644 > > --- a/drivers/gpu/drm/drm_fourcc.c > > +++ b/drivers/gpu/drm/drm_fourcc.c > > @@ -202,6 +202,7 @@ const struct drm_format_info *__drm_format_info(u32 format) > > { .format = DRM_FORMAT_XBGR16161616F, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1 }, > > { .format = DRM_FORMAT_ARGB16161616F, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true }, > > { .format = DRM_FORMAT_ABGR16161616F, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true }, > > + { .format = DRM_FORMAT_AXBXGXRX106106106106, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true }, > > { .format = DRM_FORMAT_RGB888_A8, .depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true }, > > { .format = DRM_FORMAT_BGR888_A8, .depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true }, > > { .format = DRM_FORMAT_XRGB8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true }, > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > > index 82f327801267..76eedba52b77 100644 > > --- a/include/uapi/drm/drm_fourcc.h > > +++ b/include/uapi/drm/drm_fourcc.h > > @@ -155,6 +155,13 @@ extern "C" { > > #define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */ > > #define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */ > > > > +/* > > + * RGBA format with 10-bit components packed in 64-bit per pixel, with 6 bits > > + * of unused padding per component: > > + * [63:0] A:x:B:x:G:x:R:x 10:6:10:6:10:6:10:6 little endian > > I think we usually put that last bit at the end of the fourcc define. > In theory it makes grepping a bit nicer. The exceptions are all planar > formats where each plane can have different component packing. Makes sense, I'll change the patch as suggested. Thanks, Matteo > > > + */ > > +#define DRM_FORMAT_AXBXGXRX106106106106 fourcc_code('A', 'B', '1', '0') > > + > > /* packed YCbCr */ > > #define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */ > > #define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */ > > -- > > 2.17.1 > > > > _______________________________________________ > > dri-devel mailing list > > dri-devel@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > -- > Ville Syrj�l� > Intel > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel