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[23.128.96.18]) by mx.google.com with ESMTP id w5si1425073eji.82.2020.10.07.06.37.15; Wed, 07 Oct 2020 06:37:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eH1+4bAx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728480AbgJGNfl (ORCPT + 99 others); Wed, 7 Oct 2020 09:35:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728450AbgJGNfl (ORCPT ); Wed, 7 Oct 2020 09:35:41 -0400 Received: from mail-lf1-x142.google.com (mail-lf1-x142.google.com [IPv6:2a00:1450:4864:20::142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6D70C0613D3 for ; Wed, 7 Oct 2020 06:35:40 -0700 (PDT) Received: by mail-lf1-x142.google.com with SMTP id 184so2307755lfd.6 for ; Wed, 07 Oct 2020 06:35:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=+w1W+CUXGGFXbZ34Qh5CjZMXrIFvrZ3lWXBN60hppFc=; b=eH1+4bAxQ4Xw2n/zbFWwccR3SePzT0zlwNq4GU+LGKhCNA43MoCZwQdQMjjUAcMuGh dsluM8ozYSNELiEQJFLaR3eiEn5++Dq8al3D8Khr1tTZPks7r68Wpt3sMEXduHALpgAH cUuaTKI0v+ut5Jl+ezPoJNv9Az1p9q+Mqv5kV+gUHpQCMkPsrcmwYwyDD9bEp49cOiYr u9O50ktsJyTOWWV11DouAXXAxK67iKi9Rk4kjR/SMSFQZnBr0YjP7aqLRc/FE+sVl1Ic zIrd44diWdrcacEuYGR8KZyA8OSaK5fqklnFqa4WgbHRkmOYgq2U4pp3PbNa8Q/GyEAb x6eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=+w1W+CUXGGFXbZ34Qh5CjZMXrIFvrZ3lWXBN60hppFc=; b=AgeexITDkAwv20Ov6R2kNJC2VZHuoWJ9/eNlKxKDlXrr4A8FmaKaAhO+knAKEo5LeY Vkb7EFgbYHR+IdvpYZ2LfBb83K2L4phrwGHUVanS/H0HEOkc9ozQzGMTWDMyYOE3ItOF 8SxdC6G+6h1qq90XCRfQieMc5hF16NKjVMVzhZVMlr019Z8ewuC/BsHoMjDiO/XupngJ OjSCXZ+1i21aZWbvsYI4Hy16NPDpH8O/Jp53+0hC+e3sSvoWvEWaM1AhIVjp4gVfLZn2 VTYOgcJmuIznnK1FC0H/FUIxgilGoRt+gKlaLUnYxuXUHVx5f/sy3c9nHPkcn+xcdr9r jA/Q== X-Gm-Message-State: AOAM531d9946n3JbDjNUvQOucoZWvg/xA//5ptOZEwSY5nrZeCye8fxt nyPvgcQTyUCsJMpR8BYmqhQ074Ekfh6xS8fRGLhXHg== X-Received: by 2002:ac2:4c11:: with SMTP id t17mr1043456lfq.260.1602077737755; Wed, 07 Oct 2020 06:35:37 -0700 (PDT) MIME-Version: 1.0 References: <20201007111145.2306213-1-lars.povlsen@microchip.com> <20201007111145.2306213-2-lars.povlsen@microchip.com> In-Reply-To: <20201007111145.2306213-2-lars.povlsen@microchip.com> From: Linus Walleij Date: Wed, 7 Oct 2020 15:35:26 +0200 Message-ID: Subject: Re: [PATCH v4 1/3] dt-bindings: pinctrl: Add bindings for pinctrl-mchp-sgpio driver To: Lars Povlsen Cc: Rob Herring , Microchip Linux Driver Support , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "open list:GPIO SUBSYSTEM" , Linux ARM , "linux-kernel@vger.kernel.org" , Alexandre Belloni Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Lars, a new version of the patch set arrives while I'm reviewing, haha :D On Wed, Oct 7, 2020 at 1:12 PM Lars Povlsen wrote: > This adds DT bindings for the Microsemi/Microchip SGPIO controller, > bindings microchip,sparx5-sgpio, mscc,ocelot-sgpio and > mscc,luton-sgpio. > > Signed-off-by: Lars Povlsen (...) > + reg: > + description: | > + The GPIO bank number. "0" is designates the input pin bank, > + "1" the output bank. > + maxItems: 1 Excellent. > + '#gpio-cells': > + const: 3 So I thought you needed three cells exactly because the middle cell would get you the bank. That you now have in reg. So what about using the standard twocell? Yours, Linus Walleij