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[23.128.96.18]) by mx.google.com with ESMTP id k16si1882227edv.269.2020.10.07.10.05.59; Wed, 07 Oct 2020 10:06:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=cPmVZRUw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728209AbgJGKtn (ORCPT + 99 others); Wed, 7 Oct 2020 06:49:43 -0400 Received: from mail.kernel.org ([198.145.29.99]:60612 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728204AbgJGKtm (ORCPT ); Wed, 7 Oct 2020 06:49:42 -0400 Received: from localhost (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C902C20870; Wed, 7 Oct 2020 10:49:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602067782; bh=1wuWrBxTStM0az/awlDUjLP9jEWZ5Wpim0mWksWSOUA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cPmVZRUwByaoivWI1uqYU7zS5g9j5p/qV2QRVTG29W6uwF5tMLyYP3nNpY1J4NUTX 7JMG/znA/bnbXIHJWikzQM73gt6MQd5pa/TdAklZizIUrmK5f7cYYxo0S/43gypMtr +jKrye872fH2qRyuYsmcN8LAF434DjiLsK9L6arg= Date: Wed, 7 Oct 2020 11:48:38 +0100 From: Mark Brown To: Andre Przywara Cc: Catalin Marinas , Will Deacon , Mark Rutland , Ard Biesheuvel , Richard Henderson , Lorenzo Pieralisi , Sudeep Holla , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] arm64: Add support for SMCCC TRNG firmware interface Message-ID: <20201007104838.GA5030@sirena.org.uk> References: <20201006201808.37665-1-andre.przywara@arm.com> <20201006201808.37665-3-andre.przywara@arm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="wRRV7LY7NUeQGEoC" Content-Disposition: inline In-Reply-To: <20201006201808.37665-3-andre.przywara@arm.com> X-Cookie: Two heads are more numerous than one. User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --wRRV7LY7NUeQGEoC Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Oct 06, 2020 at 09:18:08PM +0100, Andre Przywara wrote: > The ARM architected TRNG firmware interface, described in ARM spec > DEN0098[1], defines an ARM SMCCC based interface to a true random number > generator, provided by firmware. > This can be discovered via the SMCCC >=v1.1 interface, and provides > up to 192 bits of entropy per call. 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