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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id g7sm2027896otk.56.2020.10.07.10.41.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Oct 2020 10:41:20 -0700 (PDT) Received: (nullmailer pid 432483 invoked by uid 1000); Wed, 07 Oct 2020 17:41:19 -0000 Date: Wed, 7 Oct 2020 12:41:19 -0500 From: Rob Herring To: Jisheng Zhang Cc: Kishon Vijay Abraham I , Lorenzo Pieralisi , Bjorn Helgaas , Jingoo Han , Gustavo Pimentel , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/2] PCI: dwc: Fix MSI page leakage in suspend/resume Message-ID: <20201007174119.GA376477@bogus> References: <20200930091205.792d6c7c@xhacker.debian> <20200930091449.50ae0caf@xhacker.debian> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200930091449.50ae0caf@xhacker.debian> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 30, 2020 at 09:15:25AM +0800, Jisheng Zhang wrote: > Currently, dw_pcie_msi_init() allocates and maps page for msi, then > program the PCIE_MSI_ADDR_LO and PCIE_MSI_ADDR_HI. The Root Complex > may lose power during suspend-to-RAM, so when we resume, we want to > redo the latter but not the former. If designware based driver (for > example, pcie-tegra194.c) calls dw_pcie_msi_init() in resume path, the > msi page will be leaked. > > As pointed out by Rob and Ard, there's no need to allocate a page for > the MSI address, we could use an address in the driver data. > > To avoid map the MSI msg again during resume, we move the map MSI msg > from dw_pcie_msi_init() to dw_pcie_host_init(). > > Signed-off-by: Jisheng Zhang > --- > drivers/pci/controller/dwc/pci-dra7xx.c | 18 ++++++++++- > .../pci/controller/dwc/pcie-designware-host.c | 32 +++++++++---------- > drivers/pci/controller/dwc/pcie-designware.h | 2 +- > 3 files changed, 34 insertions(+), 18 deletions(-) I'm working on some larger MSI clean-ups which should eliminate the dra7xx addition, but this is good enough for now. Reviewed-by: Rob Herring