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[23.128.96.18]) by mx.google.com with ESMTP id u13si2462765ejx.104.2020.10.07.17.12.19; Wed, 07 Oct 2020 17:12:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=2pt31eEE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726400AbgJHAB0 (ORCPT + 99 others); Wed, 7 Oct 2020 20:01:26 -0400 Received: from mail.kernel.org ([198.145.29.99]:44800 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726181AbgJHAB0 (ORCPT ); Wed, 7 Oct 2020 20:01:26 -0400 Received: from mail-ed1-f46.google.com (mail-ed1-f46.google.com [209.85.208.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7CE8C20872 for ; Thu, 8 Oct 2020 00:01:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602115285; bh=DQSQgnf7iZN9oYiYCpxCoUi+P0CeJf5tjxkIeK1NTSU=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=2pt31eEE2afgzpWpq2IhHZO3N1ID2FEFu00XbkVtKKFAOjq1Tfwn/lcd6Z8VHVFyE TUBxWztRZpZSGsBDEGV9x+96DtTas0+0jP7c8c/t7y8hbW++rpWpWQKOkDYM2cSTu6 47DKS+qi/se9zuQpb23EtolCoT6TkxDCZTRFbwno= Received: by mail-ed1-f46.google.com with SMTP id g4so4039270edk.0 for ; Wed, 07 Oct 2020 17:01:25 -0700 (PDT) X-Gm-Message-State: AOAM5336SOfXEn4MN49nre4GAZw2Wg6Q3+m1MqYKcjenqIww4FbqtjFR snPr2biBtLUTOj0YsfAcKVS3f3zEZhru67rGCw== X-Received: by 2002:aa7:c3ca:: with SMTP id l10mr6393321edr.72.1602115284045; Wed, 07 Oct 2020 17:01:24 -0700 (PDT) MIME-Version: 1.0 References: <20201006193320.405529-1-enric.balletbo@collabora.com> <20201006193320.405529-5-enric.balletbo@collabora.com> In-Reply-To: <20201006193320.405529-5-enric.balletbo@collabora.com> From: Chun-Kuang Hu Date: Thu, 8 Oct 2020 08:01:12 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 4/4] soc: mediatek: mmsys: Use an array for setting the routing registers To: Enric Balletbo i Serra Cc: linux-kernel , Collabora Kernel ML , Yongqiang Niu , Matthias Brugger , Nicolas Boichat , Hsin-Yi Wang , Chun-Kuang Hu , CK Hu , Linux ARM , "moderated list:ARM/Mediatek SoC support" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Enric: Enric Balletbo i Serra =E6=96=BC 2020=E5=B9= =B410=E6=9C=887=E6=97=A5 =E9=80=B1=E4=B8=89 =E4=B8=8A=E5=8D=883:33=E5=AF=AB= =E9=81=93=EF=BC=9A > > From: CK Hu > > Actually, setting the registers for routing, use multiple 'if-else' for d= ifferent > routes, but this code would be more and more complicated while we > support more and more SoCs. Change that and use a table per SoC so the > code will be more portable and clear. > > Signed-off-by: CK Hu > Signed-off-by: Enric Balletbo i Serra > --- > > drivers/soc/mediatek/mtk-mmsys.c | 393 +++++++++++++++++-------------- > 1 file changed, 210 insertions(+), 183 deletions(-) > [snip] > > static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data =3D { > @@ -93,10 +115,6 @@ static const struct mtk_mmsys_driver_data mt6797_mmsy= s_driver_data =3D { > .clk_driver =3D "clk-mt6797-mm", > }; > > -static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data =3D { > - .clk_driver =3D "clk-mt8173-mm", > -}; > - > static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data =3D { > .clk_driver =3D "clk-mt8183-mm", > }; > @@ -106,180 +124,192 @@ struct mtk_mmsys { > const struct mtk_mmsys_driver_data *data; > }; > [snip] > +static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data =3D { > + .clk_driver =3D "clk-mt8173-mm", > + .routes =3D mt8173_mmsys_routing_table, > + .num_routes =3D ARRAY_SIZE(mt8173_mmsys_routing_table), > +}; > I remove my Reviewed-by tag. You does not set routes for mt2701 and mt2712, but these two SoC need that. Maybe now they use the same table as mt8173. Regards, Chun-Kuang.