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Thu, 8 Oct 2020 13:14:56 -0400 (EDT) Date: Thu, 8 Oct 2020 19:14:54 +0200 From: Maxime Ripard To: Michal =?utf-8?B?U3VjaMOhbmVr?= Cc: linux-arm-kernel@lists.infradead.org, Rob Herring , Chen-Yu Tsai , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: sun8i: h2+: Enable optional SPI flash on Orange Pi Zero board Message-ID: <20201008171454.qixrcjmhzko766su@gilmour.lan> References: <20200929083025.2089-1-msuchanek@suse.de> <20201008151315.v3geykbs6musl4wq@gilmour.lan> <20201008160219.GM29778@kitsune.suse.cz> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="3gpiop36hze6ih2e" Content-Disposition: inline In-Reply-To: <20201008160219.GM29778@kitsune.suse.cz> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --3gpiop36hze6ih2e Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Oct 08, 2020 at 06:02:19PM +0200, Michal Such=E1nek wrote: > On Thu, Oct 08, 2020 at 05:13:15PM +0200, Maxime Ripard wrote: > > Hi, > >=20 > > On Tue, Sep 29, 2020 at 10:30:25AM +0200, Michal Suchanek wrote: > > > The flash is present on all new boards and users went out of their way > > > to add it on the old ones. > > >=20 > > > Enabling it makes a more reasonable default. > > >=20 > > > Signed-off-by: Michal Suchanek > > > --- > > > arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 4 ++-- > > > 1 file changed, 2 insertions(+), 2 deletions(-) > > >=20 > > > diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch= /arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts > > > index f19ed981da9d..061d295bbba7 100644 > > > --- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts > > > +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts > > > @@ -163,8 +163,8 @@ &ohci1 { > > > }; > > > =20 > > > &spi0 { > > > - /* Disable SPI NOR by default: it optional on Orange Pi Zero boards= */ > > > - status =3D "disabled"; > > > + /* Enable optional SPI NOR by default */ > > > + status =3D "okay"; > > > =20 > > > flash@0 { > > > #address-cells =3D <1>; > >=20 > > Unfortunately, it's optional, so there's really no reason to enable it > > all the time. If it's troublesome to users, then the distros or vendors > > should make the changes necessary to the hardware, bootloader or their > > documentation to make it easier for those users. >=20 > I don't understand the reasoning. Why must it be disabled when optional? Think about it the other way around. If we enable everything that is optional, we're going to have a multitude of conflicts everywhere, and without a clear decision as to who is "best" and thus how we should resolve it. On a separate platform, recently I've been using a VGA bridge for the RaspberryPi that takes the UART pins as well. It's definitely optional, should I enable it by default? At the same time, enabling by default the UART is just as arbitrary and will result in people using the VGA bridge to complain about their regression (rightfully so). So, really, if it's optional, it means that it not always there. If it's not always there, it's meant to be supported by an overlay. > By the same reasoning there is no reason to disable it all the time. I'm not sure I follow you here. The least common denominator is that it's not there, so it's not enabled. > Also the boards that do not have the flsh are either broken or > obsolete. Making general statements without arguments doesn't really make it true though. Plenty of boards to have flash and are neither broken nor obsolete. > So most of the time enabling the flash chip is the right thing. >=20 > Or do we need two DTBs like sun8i-h2-plus-orangepi-zero.dts and > sun8i-h2-plus-orangepi-zero-no-spi-nor.dts No, you need sun8i-h2-plus-orangepi-zero plus an overlay for the SPI-NOR. > There is no way to change the setting on a runnig system, the pins are > routed to the flash pads anyway so are not usable for anything else. The > only thing that happens on boards that do not have the flash is kernel > probing it and complaining that the ID 00 00 00 is not valid SPI NOR > flash memory ID. We have people reporting bugs about completely innocuous error messages without any side effects already. An error about a missing or broken storage device will surely raise some eyebrows. Maxime --3gpiop36hze6ih2e Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCX39JDgAKCRDj7w1vZxhR xWYCAP4hhSm4f5GM2iD7i6x++2ALyXsf7QhxO15ZYgu0Qh0ReQD/T0zvFuqJDMF2 5spX2m34fPYJM/5ibaOLl103p2EnVAQ= =Dtct -----END PGP SIGNATURE----- --3gpiop36hze6ih2e--