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Mooring" , "sunnyliangjy@gmail.com" , Punit Agrawal , Michal Simek , "michael.auchter@ni.com" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Mathieu Poirier , "linux-remoteproc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Rob Herring , Linux ARM Subject: RE: [PATCH v18 4/5] dt-bindings: remoteproc: Add documentation for ZynqMP R5 rproc bindings In-Reply-To: Message-ID: References: <20201005160614.3749-1-ben.levinsky@xilinx.com> <20201005160614.3749-5-ben.levinsky@xilinx.com> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 669c454d-befb-4637-c00b-08d86bc7dd9f X-MS-TrafficTypeDiagnostic: MWHPR02MB2783: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: d8umX65HfaWHTRmhj7kAOgf3V1XHSwDSBjB6GI28SZAQ/K2y5OCdi27CoiR9WPv4Mu4xGZtzhc7eYNAcmvwV2oSA2eqRtkuUiaoNu2xZfclyzjNL/2a85dkWp0ZF4bPsm7ElRbYhcuN7G8z1VHo5WTFCB/qThIxbcXqGaJjNUwb5IA15cpAzcohVZ/Igmk1wEmUFBN8esd+gdjXXj4R0fhFbrVngiibuBc0L2M3k7+AIHyHrC0Gd7SBAbg3MRjY46m49u/Ov6wiWQIlhF/7Rvw+NBOki0/Jz+HJM1x2pjYt2f0+KGrN/ZkK5VK1iLwstXjqgWdaddR/KepI4ISY8UsAitiN6bbM2X5j/0a4M2w5gszNBp2K4d+ERKbIlbxEOXU7gmZecKeYyAcoo/AEO9JQJMAm/89qdNfP56TUtXPECdBHeoVLgLvGKD7AzJ997zYMiUwZc/cnc7hFQziTU91RF+C3qgv9Lv2FuQKPLjDc= X-Forefront-Antispam-Report: CIP:149.199.60.83;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:xsj-pvapsmtpgw01;PTR:unknown-60-83.xilinx.com;CAT:NONE;SFS:(7916004)(136003)(396003)(346002)(376002)(39860400002)(46966005)(356005)(9686003)(426003)(82740400003)(47076004)(336012)(186003)(81166007)(83080400001)(82310400003)(2906002)(26005)(316002)(54906003)(9786002)(7416002)(44832011)(4326008)(4744005)(8676002)(5660300002)(8936002)(966005)(33716001)(70206006)(70586007)(478600001);DIR:OUT;SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Oct 2020 20:22:23.3673 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 669c454d-befb-4637-c00b-08d86bc7dd9f X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: BL2NAM02FT036.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR02MB2783 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 8 Oct 2020, Ben Levinsky wrote: > > Does it mean that the main CPU see the memory of the > > R5 as "some kind of TCM" and that TCM is physically > > mapped at 0xffe00000 (ITCM) and 0xffe20000 (DTCM)? > > > > If the first is ITCM and the second DTCM that is pretty > > important to point out, since this reflects the harvard > > architecture properties of these two memory areas. Hi Linus, I don't think Xilinx TCMs are split in ITCM and DTCM in the way you describe here: https://www.kernel.org/doc/Documentation/arm/tcm.txt. Either TCM could be used for anything. See https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf at page 82.