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[209.85.217.42]) by smtp.gmail.com with ESMTPSA id v18sm193790uat.5.2020.10.09.08.05.22 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Oct 2020 08:05:22 -0700 (PDT) Received: by mail-vs1-f42.google.com with SMTP id r24so5127877vsp.8 for ; Fri, 09 Oct 2020 08:05:22 -0700 (PDT) X-Received: by 2002:a67:bc0d:: with SMTP id t13mr8045062vsn.4.1602255921448; Fri, 09 Oct 2020 08:05:21 -0700 (PDT) MIME-Version: 1.0 References: <1602176947-17385-1-git-send-email-akhilpo@codeaurora.org> In-Reply-To: <1602176947-17385-1-git-send-email-akhilpo@codeaurora.org> From: Doug Anderson Date: Fri, 9 Oct 2020 08:05:10 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/2] arm64: dts: qcom: sc7180: Add gpu cooling support To: Akhil P Oommen Cc: freedreno , Rob Herring , Rob Clark , dri-devel@freedesktop.org, linux-arm-msm , LKML , Jordan Crouse , Matthias Kaehlcke Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Thu, Oct 8, 2020 at 10:10 AM Akhil P Oommen wrote: > > Add cooling-cells property and the cooling maps for the gpu tzones > to support GPU cooling. > > Signed-off-by: Akhil P Oommen > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 29 ++++++++++++++++++++++------- > 1 file changed, 22 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index d46b383..40d6a28 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -2,7 +2,7 @@ > /* > * SC7180 SoC device tree source > * > - * Copyright (c) 2019, The Linux Foundation. All rights reserved. > + * Copyright (c) 2019-20, The Linux Foundation. All rights reserved. > */ > > #include > @@ -1885,6 +1885,7 @@ > iommus = <&adreno_smmu 0>; > operating-points-v2 = <&gpu_opp_table>; > qcom,gmu = <&gmu>; > + #cooling-cells = <2>; Presumably we should add this to the devicetree bindings, too? > interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>; > interconnect-names = "gfx-mem"; > @@ -3825,16 +3826,16 @@ > }; > > gpuss0-thermal { > - polling-delay-passive = <0>; > + polling-delay-passive = <100>; Why did you make this change? I'm pretty sure that we _don't_ want this since we're using interrupts for the thermal sensor. See commit 22337b91022d ("arm64: dts: qcom: sc7180: Changed polling mode in Thermal-zones node"). > polling-delay = <0>; > > thermal-sensors = <&tsens0 13>; > > trips { > gpuss0_alert0: trip-point0 { > - temperature = <90000>; > + temperature = <95000>; > hysteresis = <2000>; > - type = "hot"; > + type = "passive"; Matthias probably knows better, but I wonder if we should be making two passive trip levels like we do with CPU. IIRC this is important if someone wants to be able to use this with IPA.