Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp2616839pxu; Sat, 10 Oct 2020 01:27:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw5ir/KR4x7QrM2trBxSYNUZt26dxVQ8xxwtJ8u84ePhhRAbC8LMYrppx6/LPipFc10TNNJ X-Received: by 2002:a17:906:7210:: with SMTP id m16mr18973602ejk.490.1602318456180; Sat, 10 Oct 2020 01:27:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602318456; cv=none; d=google.com; s=arc-20160816; b=ocuA/LeZFCR5iy0szhQ2kKOcci+90zQaz1teZNf6EZf2Ix4U4pwrm4V8RQ3UFjMc88 9UU3BGOj5xgEwZobiVYTUjYAlLCHjDW+qZXwsFdwk2D6UvXLw2ItM0PffCHhraIyj3YI Uk3BHVAOeLEikflegGlfOiMbEmLlMnsYbUNHfKt4rHpYWfuxe2aL+Svl1RbdcFzPP4Vy wbI04XiBKvd2SqFMYfF3ewWK3W78cVMpGc+WNvNlfihjUOt4aRW+sdTHiWqzXkCfypsw pF4cCiCLFmLTZNjiKqj7DTKLG7d9C+2H2/ztdxvsIJIzkn7iRpCw3Obn5AfkzrNFdpEu /PCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=Jm5GDnemk6SdFZa1utWb0l9a99bbQP/NqfI5iJ61ABo=; b=xMZg1JbwNOa1056blqGCMW92lhnHwCAr7MCkAJNjkZ4zJsye10jPI4rs9jqMKcY1h/ NOOkelU1FrLqs7gBhpAUwox1qXx6VGYgZx25gKMyuy9O/KKEv0J9JTgXnCymdVVAvuFN OO42tWOg88X1qJlhjL2kE/kHJ7aOFDFtJITwIELdIWcdMIFvC+AJ4eAHnF0dC15eyqiE bjr0521JOEMybZs0s4dcNuw62Mwh1+Fij8Zp+a8KicrJ5QwHXuyEWNIkJBmZH5js62Xj W5OxrRdSn24QRuLWSBa2S2YIXuViXCZ+SYPeJ8P5sXrrP0Ocslb2PrEyvqy44oThcwfC sz8g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t24si7851177edr.506.2020.10.10.01.27.12; Sat, 10 Oct 2020 01:27:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726343AbgJJEB3 (ORCPT + 99 others); Sat, 10 Oct 2020 00:01:29 -0400 Received: from mail-m17613.qiye.163.com ([59.111.176.13]:33588 "EHLO mail-m17613.qiye.163.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730884AbgJJDgI (ORCPT ); Fri, 9 Oct 2020 23:36:08 -0400 Received: from ubuntu.localdomain (unknown [157.0.31.124]) by mail-m17613.qiye.163.com (Hmail) with ESMTPA id A04B4482738; Sat, 10 Oct 2020 11:29:05 +0800 (CST) From: Bernard Zhao To: Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Bernard Zhao , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: opensource.kernel@vivo.com Subject: [PATCH] drm/msm/disp: add error value record in for circle`s error index Date: Fri, 9 Oct 2020 20:28:56 -0700 Message-Id: <20201010032858.4441-1-bernard@vivo.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgYFAkeWUFZS1VLWVdZKFlBSE83V1ktWUFJV1kPCR oVCBIfWUFZHxpOT0sfHx0dGUlDVkpNS0lIS0tOT05DTUpVEwETFhoSFyQUDg9ZV1kWGg8SFR0UWU FZT0tIVUpKS0hKQ1VLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6OFE6DQw*Nz8eS0NDDhwNPUg2 L08KCxFVSlVKTUtJSEtLTk9NSEtOVTMWGhIXVRkeCRUaCR87DRINFFUYFBZFWVdZEgtZQVlKTkxV S1VISlVKSU9ZV1kIAVlBSU1ISDcG X-HM-Tid: 0a75108e0b2d93bakuwsa04b4482738 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In function dpu_core_irq_enable & dpu_core_irq_disable, when some index enable or disable failed, return value will be covered by next success index. Upper call function will not catch this error, this maybe does not meet the expectation. This change is to make the code a bit more readable. Signed-off-by: Bernard Zhao --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c index f1bc6a1af7a7..e6da0469b743 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c @@ -123,8 +123,8 @@ int dpu_core_irq_enable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count) DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idxs[0], counts); for (i = 0; (i < irq_count) && !ret; i++) - ret = _dpu_core_irq_enable(dpu_kms, irq_idxs[i]); - + if (_dpu_core_irq_enable(dpu_kms, irq_idxs[i]) != 0) + ret = -EINVAL; return ret; } @@ -178,8 +178,8 @@ int dpu_core_irq_disable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count) DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idxs[0], counts); for (i = 0; (i < irq_count) && !ret; i++) - ret = _dpu_core_irq_disable(dpu_kms, irq_idxs[i]); - + if (_dpu_core_irq_disable(dpu_kms, irq_idxs[i]) != 0) + ret = -EINVAL; return ret; } -- 2.28.0