Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp3015962pxu; Sat, 10 Oct 2020 16:12:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxVj1qUb5snksX6wRpZ7cqMJZ9GIwDAUg6ck0Ph0DnGoNqUwkNUee3ynUiS4mcqDzKeIhiM X-Received: by 2002:a50:fc0d:: with SMTP id i13mr6558435edr.122.1602371527475; Sat, 10 Oct 2020 16:12:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602371527; cv=none; d=google.com; s=arc-20160816; b=Qyqf8/Qwpq6XotKkD0/Pa9GOJqOSzJAwM2tqAGProLhtM1TRCgL3DutKDLFmEexzTh VeF0Z1exO57E0+Poyna2HHUoMQb6OphG+eUfBK1OT9EeN20CX34V8tKUGBvWupvlMmva k2VfKYpoRCQYQ8YCEGUD3/u9qV5+qTeDFonXp4cTc4SFvE/43uQZLJZyn+UqM/S2FEsE SWn2W124Lqf3z7/nkkZqH2IEC/gronbRpRyZBkbAp7naiXzCATwEwSw5TBDF4kEIZjQR I3gkP/l/dLpgfEJdqhC3EGbG3/VvOI/0RKd3m+sIkpXxbgPPZ0yCXodlRmouR22/oWoD pd3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=M9rgUtertnE2F3hxDBjMjbtnWLz7cfkqe0oDtueDq8s=; b=y/shkSOZPx3kO+Htkyp0qh4xDd6JcPZ3adzqDoeR1SnKGgq0QIe6yoFhiQWhRKt7oU E2jJyk4IWSFcHNzvn8vUBFkNorg7kcr6Fsen6JgJJLntWmc9TVD6jlOXY4R/MCxpn7wg B2Xla5GKabMG3xgvvBBom6gieY2QZ5FzCz/93/gciwto8sCtuNuZC1uFMnXgxZt+8/KI UXhne0o46NHj4pSeelugS8XbO5vFwjvZT70WY0OrTd5/1GkodmwZqcCtctPw2mJw6tfm rGmn+b3k/xkADBbStx+gZrZsDjuTu0lq91VyiBP6yAowpTaA2FpVp/yJeMymzVWZmDPQ Btew== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id li15si9154852ejb.166.2020.10.10.16.11.44; Sat, 10 Oct 2020 16:12:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390434AbgJJW5M (ORCPT + 99 others); Sat, 10 Oct 2020 18:57:12 -0400 Received: from mx2.suse.de ([195.135.220.15]:48186 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732221AbgJJTnx (ORCPT ); Sat, 10 Oct 2020 15:43:53 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 45896B14F; Sat, 10 Oct 2020 15:12:48 +0000 (UTC) From: Nicolas Saenz Julienne To: robh+dt@kernel.org, catalin.marinas@arm.com, hch@lst.de, ardb@kernel.org, linux-kernel@vger.kernel.org Cc: robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, jeremy.linton@arm.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, Nicolas Saenz Julienne , Will Deacon Subject: [PATCH v2 4/5] arm64: mm: Dynamically resize zone_dma_bits based on system's constraints Date: Sat, 10 Oct 2020 17:12:34 +0200 Message-Id: <20201010151235.20585-5-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201010151235.20585-1-nsaenzjulienne@suse.de> References: <20201010151235.20585-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With the help of of_dma_safe_phys_limit() we can get the topmost physical address accessible for DMA to the whole system and use that information to properly setup zone_dma_bits. Signed-off-by: Nicolas Saenz Julienne --- arch/arm64/include/asm/processor.h | 1 + arch/arm64/mm/init.c | 5 ++--- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index fce8cbecd6bc..c09d3f1a9a6b 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -97,6 +97,7 @@ extern phys_addr_t arm64_dma_phys_limit; #define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1) +#define ZONE_DMA_BITS_DEFAULT 32 struct debug_info { #ifdef CONFIG_HAVE_HW_BREAKPOINT diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 0eca5865dcb1..5934df93bf4d 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -42,8 +42,6 @@ #include #include -#define ARM64_ZONE_DMA_BITS 30 - /* * We need to be able to catch inadvertent references to memstart_addr * that occur (potentially in generic code) before arm64_memblock_init() @@ -196,7 +194,8 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) unsigned long max_zone_pfns[MAX_NR_ZONES] = {0}; #ifdef CONFIG_ZONE_DMA - zone_dma_bits = ARM64_ZONE_DMA_BITS; + zone_dma_bits = min(zone_dma_bits, + (unsigned int)ilog2(of_dma_safe_phys_limit())); if (IS_ENABLED(CONFIG_ACPI)) { extern unsigned int acpi_iort_get_zone_dma_size(void); -- 2.28.0