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Date:   Mon, 12 Oct 2020 09:51:58 +1100
From:   Stephen Rothwell <sfr@canb.auug.org.au>
To:     Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>, Arnd Bergmann <arnd@arndb.de>
Cc:     Jean-Philippe Brucker <jean-philippe@linaro.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Linux Next Mailing List <linux-next@vger.kernel.org>,
        Nicholas Piggin <npiggin@gmail.com>
Subject: linux-next: manual merge of the arm64 tree with the asm-generic
 tree
Message-ID: <20201012095158.779c6d9d@canb.auug.org.au>
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Hi all,

Today's linux-next merge of the arm64 tree got a conflict in:

  arch/arm64/include/asm/mmu_context.h

between commit:

  f911c2a7c096 ("arm64: use asm-generic/mmu_context.h for no-op implementat=
ions")

from the asm-generic tree and commit:

  48118151d8cc ("arm64: mm: Pin down ASIDs for sharing mm with devices")

from the arm64 tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

--=20
Cheers,
Stephen Rothwell

diff --cc arch/arm64/include/asm/mmu_context.h
index fe2862aa1dad,0672236e1aea..000000000000
--- a/arch/arm64/include/asm/mmu_context.h
+++ b/arch/arm64/include/asm/mmu_context.h
@@@ -174,9 -174,16 +174,15 @@@ static inline void cpu_replace_ttbr1(pg
   * Setting a reserved TTBR0 or EPD0 would work, but it all gets ugly when=
 you
   * take CPU migration into account.
   */
 -#define destroy_context(mm)		do { } while(0)
  void check_and_switch_context(struct mm_struct *mm);
 =20
- #define init_new_context(tsk,mm)	({ atomic64_set(&(mm)->context.id, 0); 0=
; })
+ static inline int
+ init_new_context(struct task_struct *tsk, struct mm_struct *mm)
+ {
+ 	atomic64_set(&mm->context.id, 0);
+ 	refcount_set(&mm->context.pinned, 0);
+ 	return 0;
+ }
 =20
  #ifdef CONFIG_ARM64_SW_TTBR0_PAN
  static inline void update_saved_ttbr0(struct task_struct *tsk,
@@@ -245,8 -251,12 +251,11 @@@ switch_mm(struct mm_struct *prev, struc
  void verify_cpu_asid_bits(void);
  void post_ttbr_update_workaround(void);
 =20
+ unsigned long arm64_mm_context_get(struct mm_struct *mm);
+ void arm64_mm_context_put(struct mm_struct *mm);
+=20
 +#include <asm-generic/mmu_context.h>
 +
  #endif /* !__ASSEMBLY__ */
 =20
  #endif /* !__ASM_MMU_CONTEXT_H */

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