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Date:   Mon, 12 Oct 2020 20:55:47 +0200
From:   Borislav Petkov <bp@alien8.de>
To:     Uros Bizjak <ubizjak@gmail.com>,
        Linus Torvalds <torvalds@linux-foundation.org>
Cc:     x86-ml <x86@kernel.org>, lkml <linux-kernel@vger.kernel.org>
Subject: Re: [GIT PULL] x86/asm updates for v5.10
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On Mon, Oct 12, 2020 at 08:41:32PM +0200, Uros Bizjak wrote:
> On Mon, Oct 12, 2020 at 8:11 PM Linus Torvalds <
> torvalds@linux-foundation.org> wrote:
> 
> > On Mon, Oct 12, 2020 at 4:06 AM Borislav Petkov <bp@suse.de> wrote:
> > >
> > > * Use XORL instead of XORQ to avoid a REX prefix and save some bytes in
> > > the .fixup section, by Uros Bizjak.
> >
> > I think this one is actually buggy.
> >
> > For the 1-byte case, it does this:
> >
> >      __get_user_asm(x_u8__, ptr, retval, "b", "=q");
> >
> > and ends up doing "xorl" on a register that we told the compiler is a
> > byte register (with that "=q")
> >
> > Yes, it uses "%k[output]" to turn that byte register into the word
> > version of the register, but there's no fundamental reason why the
> > register might not be something like "%ah".
> >
> 
> GCC does not distinguish between %ah and %al and it is not possible to pass
> "%ah" to the assembly. To access the high part of the %ax register, %h
> modifier has to be used in the assembly template.

Btw, did those get documented in the meantime? I can find them only in
gcc sources:

   k --  likewise, print the SImode name of the register.
   h -- print the QImode name for a "high" register, either ah, bh, ch or dh.

and SImode you guys call

@findex SImode
@item SImode
``Single Integer'' mode represents a four-byte integer.


and QImode:

@findex QImode
@item QImode
``Quarter-Integer'' mode represents a single byte treated as an integer.

so the above %k would turn that into %eax, IINM, since it is a SImode,
i.e., 4 bytes.

> The compiler uses high registers only as a kind of bit insert / bit extract
> operation of 8 bits at the position of 8. The compiler is free to
> substitute "movb %al, %bl" with "movl %eax, %ebx", and there are many
> instruction patterns that exercise this to implement "impossible" reg-reg
> moves involving %sil and %dil registers in 32bit mode.
> 
> Based on the above facts, the value in %ah can only live as a part of a
> wider register, %ax (and wider) in this case.

Is this going to be the case for future gccs too or is that subject to
change at some point?

> > Annoying. Because the other patch in this pull request is fine, and
> > people want it.

@Linus: I'll send you a new one with only that one tomorrow.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette