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Date:   Mon, 12 Oct 2020 16:49:12 +0800
From:   Shuo A Liu <shuo.a.liu@intel.com>
To:     Borislav Petkov <bp@alien8.de>
Cc:     linux-kernel@vger.kernel.org, x86@kernel.org,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        "H . Peter Anvin" <hpa@zytor.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>,
        Sean Christopherson <sean.j.christopherson@intel.com>,
        Yu Wang <yu1.wang@intel.com>,
        Reinette Chatre <reinette.chatre@intel.com>,
        Yakui Zhao <yakui.zhao@intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Dan Williams <dan.j.williams@intel.com>,
        Fengwei Yin <fengwei.yin@intel.com>,
        Zhi Wang <zhi.a.wang@intel.com>,
        Zhenyu Wang <zhenyuw@linux.intel.com>
Subject: Re: [PATCH v4 04/17] x86/acrn: Introduce hypercall interfaces
Message-ID: <20201012084912.GL1057@shuo-intel.sh.intel.com>
References: <20200922114311.38804-1-shuo.a.liu@intel.com>
 <20200922114311.38804-5-shuo.a.liu@intel.com>
 <20200930105408.GE6810@zn.tnic>
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On Wed 30.Sep'20 at 12:54:08 +0200, Borislav Petkov wrote:
>On Tue, Sep 22, 2020 at 07:42:58PM +0800, shuo.a.liu@intel.com wrote:
>> From: Shuo Liu <shuo.a.liu@intel.com>
>>
>> The Service VM communicates with the hypervisor via conventional
>> hypercalls. VMCALL instruction is used to make the hypercalls.
>>
>> ACRN hypercall ABI:
>>   * Hypercall number is in R8 register.
>>   * Up to 2 parameters are in RDI and RSI registers.
>>   * Return value is in RAX register.
>
>I'm assuming this is already cast in stone in the HV and it cannot be
>changed?

Yes, it is.

>
>> Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8
>> register as direct register constraints, here are two ways to use R8 in
>> extended asm:
>>   1) use explicit register variable as input
>>   2) use supported constraint as input with a explicit MOV to R8 in
>>      beginning of asm
>>
>> The number of instructions of above two ways are same.
>> Asm code from 1)
>>   38:   41 b8 00 00 00 80       mov    $0x80000000,%r8d
>>   3e:   48 89 c7                mov    %rax,%rdi
>>   41:   0f 01 c1                vmcall
>> Here, writes to the lower dword (%r8d) clear the upper dword of %r8 when
>> the CPU is in 64-bit mode.
>>
>> Asm code from 2)
>>   38:   48 89 c7                mov    %rax,%rdi
>>   3b:   49 b8 00 00 00 80 00    movabs $0x80000000,%r8
>>   42:   00 00 00
>>   45:   0f 01 c1                vmcall
>>
>> Choose 1) for code simplicity and a little bit of code size
>> optimization.
>
>What?
>
>How much "optimization" is this actually? A couple of bytes?
>
>And all that for this
>
>	/* Nothing can come between the r8 assignment and the asm: */
>
>restriction?
>
>If it is only a couple of bytes, just do the explicit MOV to %r8 and
>f'get about it.

Yes. Just a couple of bytes. Number of instructions is same.
sure, i can change to approach 2)
  2) use supported constraint as input with a explicit MOV to R8
     in beginning of asm

Thanks
shuo