Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp4271500pxu; Mon, 12 Oct 2020 14:27:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxhv7YyMfri1LTu+3uUN9GA6KBsW+9gbKrzjobHlA96+8RFrFFrhR8w+gE32eVcToNXKHsB X-Received: by 2002:aa7:c0d2:: with SMTP id j18mr6757406edp.89.1602538037610; Mon, 12 Oct 2020 14:27:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602538037; cv=none; d=google.com; s=arc-20160816; b=fhkvGfwKO7CLc3Xg1mrpGKECHJw7pDEFuelgiYzchI9X63vIaWMRfaGf+UvJSS6vH7 DNdkkftl96yJXiZPuJa4R27xcoNhhm1sey/6aLvbbaBXOZClidlcbtMCovGOsROkNKTx acZo+4ovewQa/ALN5toKNwtAiiJiJWYBvsdmUPXDcU2rz9zZd71t52Zp5tjxLPKEFFMN MVxpI0OoHD0ziPfERQIVS9qEO50qi19FxVK9lclhnyfnxFRmTO6U3JPiYjHmGrkIiF7+ NiHWaO5ydl0vf8KDZtbYZ+8STza6m+anQlBwV3raxKZ19YNVGYVbj+G1ByZZk/H98avt LJuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=nPnPeqJfUPpUWYnp+1SgNMTLWJo/0M4HlOmNwYKWAm4=; b=SwsIIv5GNtVvF2IiW7QkEuSLhEEUVQNWowiziX6xKXy4buujBI9aZA1BQPi6HBU5uA S9nEsCBJnEQ+0WraJ/CjO1Eol8oCdmjHEQp3PotJd3MDSgZzZY9xYJziobzOeDx++1U7 IaWTIez/UHhcxptC0njNWaE2OQm2OZDnjus2H+jPj6jFDjZqpjuM9Dc1SOCY5I5fSVIL 2dS7Co20g63ccWD6oQl2MjMg2fNVKx8sagYztRzzoLuhtV5YBgTPrhxMTkjZsTFzNYiM KzOvrynU9s4zjgMjbGcZiIBNmugAYtON8zDZ85IFjIUdgnRQkJk9OL+iyzpLjaI6JZrv iIbw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t24si12985507ejd.39.2020.10.12.14.26.55; Mon, 12 Oct 2020 14:27:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388945AbgJLNTu (ORCPT + 99 others); Mon, 12 Oct 2020 09:19:50 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15279 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388892AbgJLNTh (ORCPT ); Mon, 12 Oct 2020 09:19:37 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C9C39797ABAAB2713AE6; Mon, 12 Oct 2020 21:19:35 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 21:19:29 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 11/11] arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml Date: Mon, 12 Oct 2020 21:17:39 +0800 Message-ID: <20201012131739.1655-12-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012131739.1655-1-thunder.leizhen@huawei.com> References: <20201012131739.1655-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The snps,dw-apb-uart binding need to specify two clocks: "baudclk", "apb_pclk". But only "apb_pclk" is specified now. Because the driver preferentially matches the first clock. Otherwise, it matches the second clock instead of both clocks. So both of them use the same clock don't change the function. Signed-off-by: Zhen Lei --- arch/arm64/boot/dts/hisilicon/hip05.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi index 26caf09e9511b3c..c073d6d8b55c0b4 100644 --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi @@ -300,8 +300,8 @@ compatible = "snps,dw-apb-uart"; reg = <0x0 0x80300000 0x0 0x10000>; interrupts = ; - clocks = <&refclk200mhz>; - clock-names = "apb_pclk"; + clocks = <&refclk200mhz>, <&refclk200mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; @@ -311,8 +311,8 @@ compatible = "snps,dw-apb-uart"; reg = <0x0 0x80310000 0x0 0x10000>; interrupts = ; - clocks = <&refclk200mhz>; - clock-names = "apb_pclk"; + clocks = <&refclk200mhz>, <&refclk200mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; -- 1.8.3