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Subject: Re: [PATCH] PCI: dwc: Added link up check in map_bus of
 dw_child_pcie_ops
To:     Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
CC:     Rob Herring <robh@kernel.org>,
        Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>,
        "Z.q. Hou" <zhiqiang.hou@nxp.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        PCI <linux-pci@vger.kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Michael Walle <michael@walle.cc>,
        Ard Biesheuvel <ardb@kernel.org>
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From:   Kishon Vijay Abraham I <kishon@ti.com>
Message-ID: <c8f2abfc-5860-abf4-d157-38756bd09907@ti.com>
Date:   Mon, 12 Oct 2020 22:01:23 +0530
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Hi Lorenzo,

On 08/10/20 8:38 pm, Lorenzo Pieralisi wrote:
> On Thu, Oct 01, 2020 at 07:02:04PM +0530, Kishon Vijay Abraham I wrote:
> 
> [...]
> 
>>>> Yeah, I don't see any registers in the DRA7x PCIe wrapper for disabling
>>>> error forwarding.
>>>
>>> It's a DWC port logic register AFAICT, but perhaps not present in all versions.
>>
>> Okay. I see there's a register PCIECTRL_PL_AXIS_SLV_ERR_RESP which has a
>> reset value of 0.
>>
>> It has four bit-fields, RESET_TIMEOUT_ERR_MAP, NO_VID_ERR_MAP,
>> DBI_ERR_MAP and SLAVE_ERR_MAP. I'm not seeing any difference in behavior
>> if I set all these bits. Maybe it requires platform support too. I'll
>> check this with our design team.
>>
>> Meanwhile would it be okay to add linkup check atleast for DRA7X so that
>> we could have it booting in linux-next?
> 
> Do you mind sending a patch on top of my pci/dwc please ?

I just tried applying this on your pci/dwc branch and it applied without
any conflicts. Please let me know if you still want me or Hou to resend
the patch.

Thank you,
Kishon