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[81.185.165.26]) by smtp.gmail.com with ESMTPSA id c14sm315131wrv.12.2020.10.13.10.28.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Oct 2020 10:28:40 -0700 (PDT) From: Fabien Parent To: linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org Cc: matthias.bgg@gmail.com, daniel@ffwll.ch, airlied@linux.ie, p.zabel@pengutronix.de, chunkuang.hu@kernel.org, Fabien Parent Subject: [PATCH 2/2] drm/mediatek: mtk_hdmi: add MT8167 support for HDMI Date: Tue, 13 Oct 2020 19:28:32 +0200 Message-Id: <20201013172832.4055545-2-fparent@baylibre.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201013172832.4055545-1-fparent@baylibre.com> References: <20201013172832.4055545-1-fparent@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for HDMI on MT8167. HDMI on MT8167 is similar to MT8173/MT2701 execpt for the two registers: SYS_CFG1C and SYS_CFG20 Signed-off-by: Fabien Parent --- drivers/gpu/drm/mediatek/mtk_hdmi.c | 7 +++++++ drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 2 ++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c index c70f195c21be..7762be5cb446 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c @@ -1835,9 +1835,16 @@ static struct mtk_hdmi_data mt8173_hdmi_driver_data = { .sys_cfg20 = HDMI_SYS_CFG20, }; +static struct mtk_hdmi_conf mt8167_hdmi_driver_data = { + .sys_cfg1c = MT8167_HDMI_SYS_CFG1C, + .sys_cfg20 = MT8167_HDMI_SYS_CFG20, +}; + static const struct of_device_id mtk_drm_hdmi_of_ids[] = { { .compatible = "mediatek,mt8173-hdmi", .data = &mt8173_hdmi_driver_data }, + { .compatible = "mediatek,mt8167-hdmi", + .data = &mt8167_hdmi_driver_data }, {} }; diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h index 2050ba45b23a..a0f9c367d7aa 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h @@ -195,6 +195,7 @@ #define GEN_RGB (0 << 7) #define HDMI_SYS_CFG1C 0x000 +#define MT8167_HDMI_SYS_CFG1C 0x800 #define HDMI_ON BIT(0) #define HDMI_RST BIT(1) #define ANLG_ON BIT(2) @@ -211,6 +212,7 @@ #define HTPLG_PIN_SEL_OFF BIT(30) #define AES_EFUSE_ENABLE BIT(31) #define HDMI_SYS_CFG20 0x004 +#define MT8167_HDMI_SYS_CFG20 0x804 #define DEEP_COLOR_MODE_MASK (3 << 1) #define COLOR_8BIT_MODE (0 << 1) #define COLOR_10BIT_MODE (1 << 1) -- 2.28.0