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[23.128.96.18]) by mx.google.com with ESMTP id i8si513904edr.518.2020.10.13.13.23.53; Tue, 13 Oct 2020 13:24:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@atishpatra.org header.s=google header.b=lTPBGIvi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732743AbgJMUTr (ORCPT + 99 others); Tue, 13 Oct 2020 16:19:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732536AbgJMUTr (ORCPT ); Tue, 13 Oct 2020 16:19:47 -0400 Received: from mail-il1-x142.google.com (mail-il1-x142.google.com [IPv6:2607:f8b0:4864:20::142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D847FC0613D2 for ; Tue, 13 Oct 2020 13:19:46 -0700 (PDT) Received: by mail-il1-x142.google.com with SMTP id l16so1948968ilt.13 for ; Tue, 13 Oct 2020 13:19:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atishpatra.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=nhTxF9kZTn4QXwlE0viBXy24iL+UNB/bQsWHxd58+3A=; b=lTPBGIviCJS0XkVWi0Bwb47IvvUF5R9NgubdCLLP2ptSJRzLEhOxEcUSlocEYcKzSS W5bJpwwbj3QAueVsNweRPmEWBbilkknIoRgM8q/TwpxZ4U4SDeBbPpGKdZWphvKNgFSV DN94hFpV1myN/clvkIS9AYApUokWMrRiSRlD0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=nhTxF9kZTn4QXwlE0viBXy24iL+UNB/bQsWHxd58+3A=; b=L77B9rRtCZA6+akODgV6ETnHhp7HEbIM89ZmBipLNp+Op6M/oTJZg8KGZzmA+R5VUf H0gqQ7gpJcg7POTX+ERtJX95ihW2lA13q36iCrNKHiD9udMGTKMSNFsxf2RpARnTCVI+ ZKw0K+4WAfW6okcogGv80ohP/a+lsgBc8JwWs6a9QjSfPRqvP71X8SIw3k0WS3UyRcDv JkXEeCxlHxDgwMWkS6fEwOEgSHDvT8sUg61nucKlvvPAEpRDWrVsyk29VvRWm5XXl20O 7c13AJxZNXP8XxOvD3giTlnuTBQl01G/bb3Q/mLdr+zoGOgscwws8gcVh6pVZ3RKZrgc StRg== X-Gm-Message-State: AOAM530SPiAsIGIXbo7M6CENmfC6V/ujscIPA1VCbZOizVqHIDTFPgPK 0JYX8x7tqggfRYsKB/Dlb89bf/2uiEvkaFWRJ4So X-Received: by 2002:a05:6e02:54d:: with SMTP id i13mr1301698ils.219.1602620385949; Tue, 13 Oct 2020 13:19:45 -0700 (PDT) MIME-Version: 1.0 References: <20201006001752.248564-1-atish.patra@wdc.com> In-Reply-To: <20201006001752.248564-1-atish.patra@wdc.com> From: Atish Patra Date: Tue, 13 Oct 2020 13:19:35 -0700 Message-ID: Subject: Re: [PATCH v4 0/5] Unify NUMA implementation between ARM64 & RISC-V To: Atish Patra Cc: "linux-kernel@vger.kernel.org List" , Kefeng Wang , David Hildenbrand , Catalin Marinas , Jonathan Cameron , Zong Li , linux-riscv , Will Deacon , linux-arch@vger.kernel.org, Jia He , Anup Patel , "Rafael J. Wysocki" , Steven Price , Greentime Hu , Albert Ou , Arnd Bergmann , Anshuman Khandual , Paul Walmsley , "linux-arm-kernel@lists.infradead.org" , Greg Kroah-Hartman , Palmer Dabbelt , Mike Rapoport , Andrew Morton , Nicolas Saenz Julienne Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 5, 2020 at 5:18 PM Atish Patra wrote: > > This series attempts to move the ARM64 numa implementation to common > code so that RISC-V can leverage that as well instead of reimplementing > it again. > > RISC-V specific bits are based on initial work done by Greentime Hu [1] but > modified to reuse the common implementation to avoid duplication. > > [1] https://lkml.org/lkml/2020/1/10/233 > > This series has been tested on qemu with numa enabled for both RISC-V & ARM64. > It would be great if somebody can test it on numa capable ARM64 hardware platforms. > This patch series doesn't modify the maintainers list for the common code (arch_numa) > as I am not sure if somebody from ARM64 community or Greg should take up the > maintainership. Ganapatrao was the original author of the arm64 version. > I would be happy to update that in the next revision once it is decided. > > # numactl --hardware > available: 2 nodes (0-1) > node 0 cpus: 0 1 2 3 > node 0 size: 486 MB > node 0 free: 470 MB > node 1 cpus: 4 5 6 7 > node 1 size: 424 MB > node 1 free: 408 MB > node distances: > node 0 1 > 0: 10 20 > 1: 20 10 > # numactl -show > policy: default > preferred node: current > physcpubind: 0 1 2 3 4 5 6 7 > cpubind: 0 1 > nodebind: 0 1 > membind: 0 1 > > The patches are also available at > https://github.com/atishp04/linux/tree/5.10_numa_unified_v4 > > For RISC-V, the following qemu series is a pre-requisite(already available in upstream) > https://patchwork.kernel.org/project/qemu-devel/list/?series=303313 > > Testing: > RISC-V: > Tested in Qemu and 2 socket OmniXtend FPGA. > > ARM64: > 2 socket kunpeng920 (4 nodes around 250G a node) > Tested-by: Jonathan Cameron > > There may be some minor conflicts with Mike's cleanup series [2] depending on the > order in which these two series are being accepted. I can rebase on top his series > if required. > > [2] https://lkml.org/lkml/2020/8/18/754 > > Changes from v3->v4: > 1. Removed redundant duplicate header. > 2. Added Reviewed-by tags. > > Changes from v2->v3: > 1. Added Acked-by/Reviewed-by tags. > 2. Replaced asm/acpi.h with linux/acpi.h > 3. Defined arch_acpi_numa_init as static. > > Changes from v1->v2: > 1. Replaced ARM64 specific compile time protection with ACPI specific ones. > 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V. > 3. Fixed few typos. > > Atish Patra (4): > numa: Move numa implementation to common code > arm64, numa: Change the numa init functions name to be generic > riscv: Separate memory init from paging init > riscv: Add numa support for riscv64 platform > > Greentime Hu (1): > riscv: Add support pte_protnone and pmd_protnone if > CONFIG_NUMA_BALANCING > > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/numa.h | 45 +---------------- > arch/arm64/kernel/acpi_numa.c | 13 ----- > arch/arm64/mm/Makefile | 1 - > arch/arm64/mm/init.c | 4 +- > arch/riscv/Kconfig | 31 +++++++++++- > arch/riscv/include/asm/mmzone.h | 13 +++++ > arch/riscv/include/asm/numa.h | 8 +++ > arch/riscv/include/asm/pci.h | 14 ++++++ > arch/riscv/include/asm/pgtable.h | 21 ++++++++ > arch/riscv/kernel/setup.c | 11 ++++- > arch/riscv/kernel/smpboot.c | 12 ++++- > arch/riscv/mm/init.c | 10 +++- > drivers/base/Kconfig | 6 +++ > drivers/base/Makefile | 1 + > .../mm/numa.c => drivers/base/arch_numa.c | 30 ++++++++++-- > include/asm-generic/numa.h | 49 +++++++++++++++++++ > 17 files changed, 199 insertions(+), 71 deletions(-) > create mode 100644 arch/riscv/include/asm/mmzone.h > create mode 100644 arch/riscv/include/asm/numa.h > rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (95%) > create mode 100644 include/asm-generic/numa.h > > -- > 2.25.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv Ping ? -- Regards, Atish