Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp303214pxu; Wed, 14 Oct 2020 01:31:10 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw8aa9K3Kz6ZlaPZmNK8ttOwzkhSd/kjZoPERVPud6vbiF8IopkdAmiNDxomVqymZ0nhggI X-Received: by 2002:a17:906:6d0c:: with SMTP id m12mr4087550ejr.498.1602664270063; Wed, 14 Oct 2020 01:31:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602664270; cv=none; d=google.com; s=arc-20160816; b=feVfiKS0L5Ixp4rongkKW9ua/HWbn5B6jG0p1aQNr2aSemXGhPPiKMKGb9Z4BkoPKt e0vj2CykjBuxYlOIYxVn+tC1C+HG9iEISkNrBgdRtzHKm3/wMsTaMH43s5W8JmddZbpx oc+DtPfYiwCQMamnSX7hDCjjk36bUmySpjal7zbSzAQXv7rWW29fxUPTmHh2lsnI58Uo L3wVQCcjapLKUR6ikzZORNH/ZSCMOST8jfDDxChNA7E5qeTzsczCk9HPAREb1iuFcjbU CqgdYZUaCwN3n8af6KTGf51drWyhkmYZ/OdCjIrQ/sVMDpVwJ4f2gcyczgNQTntQPCYR EJrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:message-id:date:to:cc:from:subject :references:in-reply-to:content-transfer-encoding:mime-version :dkim-signature; bh=O3vm1vanql09l8bvJoJu8u8jXINOsNZOrGnWo/pntvg=; b=kzJ14moU2aS6R5q6QwWKpAZ4IMsruVzWRMSw1sGBLd5uzVqsy9wgGLYL6x53wFL/f4 joFZr5vOTQiPFLUbVHkuBlLN3E+RfQ8LltFVCLLpHoaZRiN8nH1/TnWXvCgG8/BbGM6c X4OvEnTw+4bF/nC3wHxQthX6q/DqzOVKLUdFscq2/KpAHd/x7ETgDt4CigecFIzfozu+ bDVe4Ls8OptVBclHnjVXT4R7UBVP87fUWbZkR+L54aQm1K1nNdzp9CZd37vN6wwxSHrQ O1UrGVj/gxpALljuYgUmYu+P4r7klf9o7BR5qSk5aaTtomgyGIEwtBrcPEBQo0RGktVk FZHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=uJLRow1Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b6si2137947ejb.204.2020.10.14.01.30.47; Wed, 14 Oct 2020 01:31:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=uJLRow1Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728274AbgJNCyG (ORCPT + 99 others); Tue, 13 Oct 2020 22:54:06 -0400 Received: from mail.kernel.org ([198.145.29.99]:40592 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726049AbgJNCyG (ORCPT ); Tue, 13 Oct 2020 22:54:06 -0400 Received: from kernel.org (unknown [104.132.1.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9091B21775; Wed, 14 Oct 2020 02:54:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602644045; bh=1hB3PWAERAP6BXliOM7WFzoZezTklW21CYdH0m5Nv2U=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=uJLRow1YTWqL0u1PykK28703eFtlUazXzDIMDbqTyw8vgXXIWHd5OeI+2scgva1T3 /8DVoVp5uT24Uy6L+J9I5nTRZTBElmi19UzZjtsWQCONJaC/bKTMTQGOBlS5uv/3Mp HLvu3eXAZ3FjVzpCGY/Q0gBhHBDhUFx336CFeoY8= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20200925233914.227786-1-lkundrak@v3.sk> References: <20200925233914.227786-1-lkundrak@v3.sk> Subject: Re: [PATCH] clk: mmp2: Fix the display clock divider base From: Stephen Boyd Cc: Michael Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Lubomir Rintel To: Lubomir Rintel Date: Tue, 13 Oct 2020 19:54:04 -0700 Message-ID: <160264404431.310579.1783996108709092551@swboyd.mtv.corp.google.com> User-Agent: alot/0.9.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Lubomir Rintel (2020-09-25 16:39:14) > The LCD clock dividers are apparently based on one. No datasheet, > determined empirically, but seems to be confirmed by line 19 of lcd.fth in > OLPC laptop's Open Firmware [1]: >=20 > h# 00000700 value pmua-disp-clk-sel \ PLL1 / 7 -> 113.86 MHz >=20 > [1] https://raw.githubusercontent.com/quozl/openfirmware/65a08a73b2cac/cp= u/arm/olpc/lcd.fth >=20 > Signed-off-by: Lubomir Rintel > --- Applied to clk-next