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[209.85.222.48]) by smtp.gmail.com with ESMTPSA id o145sm197459vkd.13.2020.10.13.15.27.06 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 13 Oct 2020 15:27:06 -0700 (PDT) Received: by mail-ua1-f48.google.com with SMTP id q20so488264uar.7 for ; Tue, 13 Oct 2020 15:27:06 -0700 (PDT) X-Received: by 2002:a9f:31ce:: with SMTP id w14mr1804071uad.104.1602628026293; Tue, 13 Oct 2020 15:27:06 -0700 (PDT) MIME-Version: 1.0 References: <1602614008-2421-1-git-send-email-tdas@codeaurora.org> <1602614008-2421-2-git-send-email-tdas@codeaurora.org> In-Reply-To: <1602614008-2421-2-git-send-email-tdas@codeaurora.org> From: Doug Anderson Date: Tue, 13 Oct 2020 15:26:54 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v0] clk: qcom: lpasscc: Re-configure the PLL in case lost To: Taniya Das Cc: Stephen Boyd , Michael Turquette , David Brown , Rajendra Nayak , linux-arm-msm , "open list:ARM/QUALCOMM SUPPORT" , linux-clk , LKML , Andy Gross Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Tue, Oct 13, 2020 at 11:33 AM Taniya Das wrote: > > In the case where the PLL configuration is lost, then the pm runtime > resume will reconfigure before usage. > > Fixes: edab812d802d ("clk: qcom: lpass: Add support for LPASS clock controller for SC7180") > Signed-off-by: Taniya Das > --- > drivers/clk/qcom/lpasscorecc-sc7180.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c > index 228d08f..5804a93 100644 > --- a/drivers/clk/qcom/lpasscorecc-sc7180.c > +++ b/drivers/clk/qcom/lpasscorecc-sc7180.c > @@ -356,6 +356,25 @@ static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = { > .num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs), > }; > > +static int lpass_core_cc_pm_clk_resume(struct device *dev) > +{ > + struct regmap *regmap = dev_get_drvdata(dev); > + int l_val; nit: technically "unsigned int" to match what regmap_read takes. > + > + pm_clk_resume(dev); Even though pm_clk_resume() doesn't currently return any errors, it would be good form to check. AKA: ret = pm_clk_resume(dev); if (ret) return ret; > + /* Read PLL_L_VAL */ > + regmap_read(regmap, 0x1004, &l_val); > + if (!l_val) > + clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap, > + &lpass_lpaaudio_dig_pll_config); > + return 0; > +} > + > +static const struct dev_pm_ops lpass_core_pm_ops = { > + SET_RUNTIME_PM_OPS(pm_clk_suspend, lpass_core_cc_pm_clk_resume, NULL) > +}; > + > static int lpass_core_cc_sc7180_probe(struct platform_device *pdev) > { > const struct qcom_cc_desc *desc; > @@ -386,6 +405,9 @@ static int lpass_core_cc_sc7180_probe(struct platform_device *pdev) > clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap, > &lpass_lpaaudio_dig_pll_config); > > + pdev->dev.driver->pm = &lpass_core_pm_ops; > + dev_set_drvdata(&pdev->dev, regmap); I'm kinda confused. Why not just change "lpass_core_cc_pm_ops"? Then you can get rid of the above two lines of code and get rid of the whole "lpass_core_pm_ops" structure? -Doug