Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp673848pxu; Wed, 14 Oct 2020 10:42:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw7xRtvBl2gw5vMPnrghtqAd119giiHzfLKU4G+K5hLqcp881TY3Gz09C9JtBgzbmKAf2G+ X-Received: by 2002:a05:6402:1446:: with SMTP id d6mr32496edx.244.1602697331375; Wed, 14 Oct 2020 10:42:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602697331; cv=none; d=google.com; s=arc-20160816; b=hLYcnYWOUuQ/z9iw/quhJ8zX39kkQyAvCcMrh0XMF2VqKT0PG8oJNW+NU+8pMdf+ax 75/bVLbwZbaIfsEgjsmkYgf6mJYjPyB+PId7x5o+JyzW8ojltTxZEgLbxIQSIqvappS6 pOjvXwOtUDEnFtZ6dPTnarSkA2moH0eEO7VYlgXVTcgZY+ryLQrMpj2Ir2fBJXPt1R7t ABXKboAObd7UWkVt/lfxe+LxRJwZqY+o+rYUyRTfKiaGwhySbwBy2yZvUGScTXjvoksu HU2SPA7mYGgqTXUw2KClWK7JgnnJuLApxHwpAdnGhFInj3laquo0s7eNt68xC/wQcQue zKDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=SvfDwPLJ7aJLLYjm+Q/4oav6v4a1KhinYNQVv/lmeu0=; b=SWKs5F+6xzWuMvJ9nkF953pI7brnswPyNm6RNd9Hk3lN2VWj1B8bXaEN1AMXbHK69n EvVF7tMqQO+uHV8aLDRcZWJJIEQREVBtxvZsCrIjRrJc7XSMEaHD/c+/WhLN7vMPSaxC Ojajd337/nfD9xBTdynn/6b7B0V8EasHKzbo0uO8OlXiK5yCeAI93GpTB99dVNORRHf8 n3ODPpmsg/eSXdvn1r4w7rO2G1Bcr9H7irxLuAz490D5986FGslGSNoPyUEWfJ7i3Ng6 URPshfymCdFQc7ZyhcY9Go74MfBO2YUiq2ike5JeSaJkKx5/x0JsJm/p/9f5mx/NfVXs oM2g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z6si252038ejw.432.2020.10.14.10.41.49; Wed, 14 Oct 2020 10:42:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729213AbgJNQm5 (ORCPT + 99 others); Wed, 14 Oct 2020 12:42:57 -0400 Received: from foss.arm.com ([217.140.110.172]:53378 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727559AbgJNQm4 (ORCPT ); Wed, 14 Oct 2020 12:42:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A2DFDD6E; Wed, 14 Oct 2020 09:42:55 -0700 (PDT) Received: from [10.57.48.76] (unknown [10.57.48.76]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 939793F71F; Wed, 14 Oct 2020 09:42:52 -0700 (PDT) Subject: Re: [PATCH v5 8/9] arm64: dts: rockchip: add isp0 node for rk3399 To: Helen Koike , Tomasz Figa Cc: devicetree@vger.kernel.org, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org, robh+dt@kernel.org, heiko@sntech.de, hverkuil-cisco@xs4all.nl, kernel@collabora.com, dafna.hirschfeld@collabora.com, ezequiel@collabora.com, mark.rutland@arm.com, karthik.poduval@gmail.com, jbx6244@gmail.com, eddie.cai.linux@gmail.com, zhengsq@rock-chips.com References: <20200722155533.252844-1-helen.koike@collabora.com> <20200722155533.252844-9-helen.koike@collabora.com> <20200926130005.GC3781977@chromium.org> <905118dd-f108-6bc0-4cf0-9544fab51690@collabora.com> From: Robin Murphy Message-ID: <49005dd4-4467-2c93-a294-3760b98a7b92@arm.com> Date: Wed, 14 Oct 2020 17:42:51 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:78.0) Gecko/20100101 Thunderbird/78.3.2 MIME-Version: 1.0 In-Reply-To: <905118dd-f108-6bc0-4cf0-9544fab51690@collabora.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-10-14 17:27, Helen Koike wrote: > Hi Tomasz, > > On 9/26/20 10:00 AM, Tomasz Figa wrote: >> Hi Helen, >> >> On Wed, Jul 22, 2020 at 12:55:32PM -0300, Helen Koike wrote: >>> From: Shunqian Zheng >>> >>> RK3399 has two ISPs, but only isp0 was tested. >>> Add isp0 node in rk3399 dtsi >>> >>> Verified with: >>> make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/media/rockchip-isp1.yaml >>> >>> Signed-off-by: Shunqian Zheng >>> Signed-off-by: Jacob Chen >>> Signed-off-by: Helen Koike >>> >>> --- >>> >>> V4: >>> - update clock names >>> >>> V3: >>> - clean up clocks >>> >>> V2: >>> - re-order power-domains property >>> >>> V1: >>> This patch was originally part of this patchset: >>> >>> https://patchwork.kernel.org/patch/10267431/ >>> >>> The only difference is: >>> - add phy properties >>> - add ports >>> --- >>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 25 ++++++++++++++++++++++++ >>> 1 file changed, 25 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> index dba9641947a3a..ed8ba75dbbce8 100644 >>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> @@ -1721,6 +1721,31 @@ vopb_mmu: iommu@ff903f00 { >>> status = "disabled"; >>> }; >>> >>> + isp0: isp0@ff910000 { >>> + compatible = "rockchip,rk3399-cif-isp"; >>> + reg = <0x0 0xff910000 0x0 0x4000>; >>> + interrupts = ; >>> + clocks = <&cru SCLK_ISP0>, >>> + <&cru ACLK_ISP0_WRAPPER>, >>> + <&cru HCLK_ISP0_WRAPPER>; >>> + clock-names = "isp", "aclk", "hclk"; >>> + iommus = <&isp0_mmu>; >>> + phys = <&mipi_dphy_rx0>; >>> + phy-names = "dphy"; >>> + power-domains = <&power RK3399_PD_ISP0>; >> >> Should this have status = "disabled" too? The mipi_dphy_rx0 node is >> disabled by default too, so in the default configuration the driver >> would always fail to probe. > > I'm thinking what is the overall guideline here. > Since isp and mipi_dphy are always present in the rk3399, shouldn't they always be enabled? > Or since they are only useful if a sensor is present, we should let the dts of the board to > enable it? Yes, the usual pattern is that anything which needs additional hardware outside the SoC to be useful is disabled by default in the SoC DTSI, and enabled in individual board DTSs as appropriate. See USB, HDMI, etc. for instance. There's probably a further debate about how much the board itself should enable if it only breaks out a connector for the user to add their own camera module, but hey, one step at a time ;) Robin.