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Thu, 15 Oct 2020 23:19:16 -0700 (PDT) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=bjornoya.blackshift.org) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kTJ51-0006OM-D8; Fri, 16 Oct 2020 08:19:07 +0200 Received: from [IPv6:2a03:f580:87bc:d400:c4e8:c8ff:a41:29c1] (unknown [IPv6:2a03:f580:87bc:d400:c4e8:c8ff:a41:29c1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits)) (Client CN "mkl@blackshift.org", Issuer "StartCom Class 1 Client CA" (not verified)) (Authenticated sender: mkl@blackshift.org) by smtp.blackshift.org (Postfix) with ESMTPSA id A284557A58B; Fri, 16 Oct 2020 06:19:05 +0000 (UTC) To: Joakim Zhang , robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, linux-imx@nxp.com, victor.liu@nxp.com, peng.fan@nxp.com, linux-can@vger.kernel.org, pankaj.bansal@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20201016134320.20321-1-qiangqing.zhang@nxp.com> <20201016134320.20321-6-qiangqing.zhang@nxp.com> From: Marc Kleine-Budde Autocrypt: addr=mkl@pengutronix.de; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <20201016134320.20321-6-qiangqing.zhang@nxp.com> Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="e2YCao1dAmU9MUcmI4fjvIZ9xo0RF51Ub" X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: mkl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --e2YCao1dAmU9MUcmI4fjvIZ9xo0RF51Ub Content-Type: multipart/mixed; boundary="IWqYkh2ZGHNECFNr85QaBk16Idv5vT8dP"; protected-headers="v1" From: Marc Kleine-Budde To: Joakim Zhang , robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, linux-imx@nxp.com, victor.liu@nxp.com, peng.fan@nxp.com, linux-can@vger.kernel.org, pankaj.bansal@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Message-ID: <0e3f5abc-6baf-53e2-959b-793dfd41c17b@pengutronix.de> Subject: Re: [PATCH 5/6] can: flexcan: add CAN wakeup function for i.MX8QM References: <20201016134320.20321-1-qiangqing.zhang@nxp.com> <20201016134320.20321-6-qiangqing.zhang@nxp.com> In-Reply-To: <20201016134320.20321-6-qiangqing.zhang@nxp.com> --IWqYkh2ZGHNECFNr85QaBk16Idv5vT8dP Content-Type: text/plain; charset=utf-8 Content-Language: de-DE Content-Transfer-Encoding: quoted-printable On 10/16/20 3:43 PM, Joakim Zhang wrote: > The System Controller Firmware (SCFW) is a low-level system function > which runs on a dedicated Cortex-M core to provide power, clock, and > resource management. It exists on some i.MX8 processors. e.g. i.MX8QM > (QM, QP), and i.MX8QX (QXP, DX). SCU driver manages the IPC interface > between host CPU and the SCU firmware running on M4. >=20 > For i.MX8QM, stop mode request is controlled by System Controller Unit(= SCU) > firmware, this patch introduces FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW quir= k > for this function. >=20 > Signed-off-by: Joakim Zhang > --- > drivers/net/can/flexcan.c | 125 ++++++++++++++++++++++++++++++++------= > 1 file changed, 107 insertions(+), 18 deletions(-) >=20 > diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c > index e708e7bf28db..a55ea8f27f7c 100644 > --- a/drivers/net/can/flexcan.c > +++ b/drivers/net/can/flexcan.c > @@ -9,6 +9,7 @@ > // > // Based on code originally by Andrey Volkov > =20 > +#include > #include > #include > #include > @@ -17,6 +18,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -242,6 +244,8 @@ > #define FLEXCAN_QUIRK_SUPPORT_FD BIT(9) > /* support memory detection and correction */ > #define FLEXCAN_QUIRK_SUPPORT_ECC BIT(10) > +/* Setup stop mode with SCU firmware to support wakeup */ > +#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW BIT(11) > =20 > /* Structure of the message buffer */ > struct flexcan_mb { > @@ -347,6 +351,7 @@ struct flexcan_priv { > u8 mb_count; > u8 mb_size; > u8 clk_src; /* clock source of CAN Protocol Engine */ > + u8 can_idx; > =20 > u64 rx_mask; > u64 tx_mask; > @@ -358,6 +363,9 @@ struct flexcan_priv { > struct regulator *reg_xceiver; > struct flexcan_stop_mode stm; > =20 > + /* IPC handle when setup stop mode by System Controller firmware(scfw= ) */ > + struct imx_sc_ipc *sc_ipc_handle; > + > /* Read and Write APIs */ > u32 (*read)(void __iomem *addr); > void (*write)(u32 val, void __iomem *addr); > @@ -387,7 +395,7 @@ static const struct flexcan_devtype_data fsl_imx6q_= devtype_data =3D { > static const struct flexcan_devtype_data fsl_imx8qm_devtype_data =3D {= > .quirks =3D FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_R= RS | > FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | FLEXCAN_QUIRK_BROKEN_PERR_STATE | > - FLEXCAN_QUIRK_SUPPORT_FD, > + FLEXCAN_QUIRK_SUPPORT_FD | FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW, > }; > =20 > static struct flexcan_devtype_data fsl_imx8mp_devtype_data =3D { > @@ -546,18 +554,46 @@ static void flexcan_enable_wakeup_irq(struct flex= can_priv *priv, bool enable) > priv->write(reg_mcr, ®s->mcr); > } > =20 > +static int flexcan_stop_mode_enable_scfw(struct flexcan_priv *priv, bo= ol enabled) > +{ > + u8 idx =3D priv->can_idx; > + u32 rsrc_id, val; > + > + if (idx =3D=3D 0) > + rsrc_id =3D IMX_SC_R_CAN_0; > + else if (idx =3D=3D 1) > + rsrc_id =3D IMX_SC_R_CAN_1; > + else > + rsrc_id =3D IMX_SC_R_CAN_2; Can you introduce something like and make use of it: #define IMX_SC_R_CAN(x) (105 + (x)) > + > + if (enabled) > + val =3D 1; > + else > + val =3D 0; > + > + /* stop mode request via scu firmware */ > + return imx_sc_misc_set_control(priv->sc_ipc_handle, rsrc_id, IMX_SC_C= _IPG_STOP, val); > +} > + > static inline int flexcan_enter_stop_mode(struct flexcan_priv *priv) > { > struct flexcan_regs __iomem *regs =3D priv->regs; > u32 reg_mcr; > + int ret; > =20 > reg_mcr =3D priv->read(®s->mcr); > reg_mcr |=3D FLEXCAN_MCR_SLF_WAK; > priv->write(reg_mcr, ®s->mcr); > =20 > /* enable stop request */ > - regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, > - 1 << priv->stm.req_bit, 1 << priv->stm.req_bit); > + if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) = { > + ret =3D flexcan_stop_mode_enable_scfw(priv, true); > + if (ret < 0) > + return ret; > + } else { > + regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, > + 1 << priv->stm.req_bit, 1 << priv->stm.req_bit); > + } > =20 > return flexcan_low_power_enter_ack(priv); > } > @@ -566,10 +602,17 @@ static inline int flexcan_exit_stop_mode(struct f= lexcan_priv *priv) > { > struct flexcan_regs __iomem *regs =3D priv->regs; > u32 reg_mcr; > + int ret; > =20 > /* remove stop request */ > - regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, > - 1 << priv->stm.req_bit, 0); > + if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) = { > + ret =3D flexcan_stop_mode_enable_scfw(priv, false); > + if (ret < 0) > + return ret; > + } else { > + regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, > + 1 << priv->stm.req_bit, 0); > + } > =20 > reg_mcr =3D priv->read(®s->mcr); > reg_mcr &=3D ~FLEXCAN_MCR_SLF_WAK; > @@ -1838,7 +1881,7 @@ static void unregister_flexcandev(struct net_devi= ce *dev) > unregister_candev(dev); > } > =20 > -static int flexcan_setup_stop_mode(struct platform_device *pdev) > +static int flexcan_setup_stop_mode_gpr(struct platform_device *pdev) > { > struct net_device *dev =3D platform_get_drvdata(pdev); > struct device_node *np =3D pdev->dev.of_node; > @@ -1883,11 +1926,6 @@ static int flexcan_setup_stop_mode(struct platfo= rm_device *pdev) > "gpr %s req_gpr=3D0x02%x req_bit=3D%u\n", > gpr_np->full_name, priv->stm.req_gpr, priv->stm.req_bit); > =20 > - device_set_wakeup_capable(&pdev->dev, true); > - > - if (of_property_read_bool(np, "wakeup-source")) > - device_set_wakeup_enable(&pdev->dev, true); > - > return 0; > =20 > out_put_node: > @@ -1895,6 +1933,56 @@ static int flexcan_setup_stop_mode(struct platfo= rm_device *pdev) > return ret; > } > =20 > +static int flexcan_setup_stop_mode_scfw(struct platform_device *pdev) > +{ > + struct net_device *dev =3D platform_get_drvdata(pdev); > + struct flexcan_priv *priv; > + int ret; > + > + priv =3D netdev_priv(dev); > + > + /* this function could be defer probe, return -EPROBE_DEFER */ > + ret =3D imx_scu_get_handle(&priv->sc_ipc_handle); > + if (ret < 0) > + dev_dbg(&pdev->dev, "get ipc handle used by SCU failed\n"); > + > + return ret; > +} > + > +/* flexcan_setup_stop_mode - Setup stop mode > + * > + * Return: 0 setup stop mode successfully or doesn't support this feat= ure > + * -EPROBE_DEFER defer probe > + * < 0 fail to setup stop mode > + */ > +static int flexcan_setup_stop_mode(struct platform_device *pdev) > +{ > + struct net_device *dev =3D platform_get_drvdata(pdev); > + struct flexcan_priv *priv; > + int ret; > + > + priv =3D netdev_priv(dev); > + > + if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) > + ret =3D flexcan_setup_stop_mode_scfw(pdev); > + else if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_G= PR) > + ret =3D flexcan_setup_stop_mode_gpr(pdev); > + else > + /* return 0 directly if stop mode is unsupport */ > + return 0; > + > + if (ret) { > + dev_warn(&pdev->dev, "failed to setup stop mode\n"); return here... > + } else { =2E..and remove the else > + device_set_wakeup_capable(&pdev->dev, true); > + > + if (of_property_read_bool(pdev->dev.of_node, "wakeup-source")) > + device_set_wakeup_enable(&pdev->dev, true); > + } > + > + return ret; > +} > + > static const struct of_device_id flexcan_of_match[] =3D { > { .compatible =3D "fsl,imx8qm-flexcan", .data =3D &fsl_imx8qm_devtype= _data, }, > { .compatible =3D "fsl,imx8mp-flexcan", .data =3D &fsl_imx8mp_devtype= _data, }, > @@ -1927,7 +2015,7 @@ static int flexcan_probe(struct platform_device *= pdev) > struct clk *clk_ipg =3D NULL, *clk_per =3D NULL; > struct flexcan_regs __iomem *regs; > int err, irq; > - u8 clk_src =3D 1; > + u8 clk_src =3D 1, can_idx =3D 0; > u32 clock_freq =3D 0; > =20 > reg_xceiver =3D devm_regulator_get_optional(&pdev->dev, "xceiver"); > @@ -1943,6 +2031,8 @@ static int flexcan_probe(struct platform_device *= pdev) > "clock-frequency", &clock_freq); > of_property_read_u8(pdev->dev.of_node, > "fsl,clk-source", &clk_src); > + of_property_read_u8(pdev->dev.of_node, > + "fsl,can-index", &can_idx); What happens if the DT doesn't contain the can-index? Move this into the flexcan_setup_stop_mode_scfw() and add error handling. > } > =20 > if (!clock_freq) { > @@ -2019,6 +2109,7 @@ static int flexcan_probe(struct platform_device *= pdev) > priv->clk_src =3D clk_src; > priv->devtype_data =3D devtype_data; > priv->reg_xceiver =3D reg_xceiver; > + priv->can_idx =3D can_idx; Assign priv->can_idx in flexcan_setup_stop_mode_scfw(), too. > =20 > if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SUPPORT_FD) { > priv->can.ctrlmode_supported |=3D CAN_CTRLMODE_FD | > @@ -2030,6 +2121,10 @@ static int flexcan_probe(struct platform_device = *pdev) > priv->can.bittiming_const =3D &flexcan_bittiming_const; > } > =20 > + err =3D flexcan_setup_stop_mode(pdev); > + if (err =3D=3D -EPROBE_DEFER) > + return -EPROBE_DEFER; > + > pm_runtime_get_noresume(&pdev->dev); > pm_runtime_set_active(&pdev->dev); > pm_runtime_enable(&pdev->dev); > @@ -2043,12 +2138,6 @@ static int flexcan_probe(struct platform_device = *pdev) > of_can_transceiver(dev); > devm_can_led_init(dev); > =20 > - if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR) {= > - err =3D flexcan_setup_stop_mode(pdev); > - if (err) > - dev_dbg(&pdev->dev, "failed to setup stop-mode\n"); > - } > - > return 0; > =20 > failed_register: >=20 Marc --=20 Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung West/Dortmund | Phone: +49-231-2826-924 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | --IWqYkh2ZGHNECFNr85QaBk16Idv5vT8dP-- --e2YCao1dAmU9MUcmI4fjvIZ9xo0RF51Ub Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCgAdFiEEK3kIWJt9yTYMP3ehqclaivrt76kFAl+JO0oACgkQqclaivrt 76lZYgf/eO9CthEQWrYzZt1okY5OxvCLpHGcSwNg03MAKj6vPDzhdXwiTuiFLvVB GiAW3EY4cLGu/pWzbDDZZ4cXpjRLnzQjnVzktMFtcbuzqc73uxJWaksiih90Zyk0 2FQg5JSM5iVRZWkNdB4BQNftsjA63rgeFyLNHSCMuMYcGruapxt1lUBqh5dNJmvJ 918PUYE9/TekVW+shPH9ObGgboFDKLNN4GaoU4WW1trZ3zrciTUvv/c7apnPXqeH Oh+a04EmF2ogtzy5p2pWkGT1mWNwNqcp+svEAUQnE64P1P+DftZ6vCUTVqofunfv WVEBLJwm8optcw0sF3MNLXW87gY2ww== =tN8m -----END PGP SIGNATURE----- --e2YCao1dAmU9MUcmI4fjvIZ9xo0RF51Ub--