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[108.51.35.162]) by smtp.googlemail.com with ESMTPSA id n2sm1044448qtr.6.2020.10.16.07.17.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 16 Oct 2020 07:17:44 -0700 (PDT) Subject: Re: [PATCH 0/4] clk: add driver for the SiFive FU740 To: Zong Li , paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, mturquette@baylibre.com, sboyd@kernel.org, yash.shah@sifive.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org References: From: Sean Anderson Autocrypt: addr=seanga2@gmail.com; prefer-encrypt=mutual; keydata= mQENBFe74PkBCACoLC5Zq2gwrDcCkr+EPGsT14bsxrW07GiYzQhLCgwnPdEpgU95pXltbFhw 46GfyffABWxHKO2x+3L1S6ZxC5AiKbYXo7lpnTBYjamPWYouz+VJEVjUx9aaSEByBah5kX6a lKFZWNbXLAJh+dE1HFaMi3TQXXaInaREc+aO1F7fCa2zNE75ja+6ah8L4TPRFZ2HKQzve0/Y GXtoRw97qmnm3U36vKWT/m2AiLF619F4T1mHvlfjyd9hrVwjH5h/2rFyroXVXBZHGA9Aj8eN F2si35dWSZlIwXkNu9bXp0/pIu6FD0bI+BEkD5S7aH1G1iAcMFi5Qq2RNa041DfQSDDHABEB AAG0K1NlYW4gR2FsbGFnaGVyIEFuZGVyc29uIDxzZWFuZ2EyQGdtYWlsLmNvbT6JAVcEEwEK AEECGwMFCwkIBwIGFQgJCgsCBBYCAwECHgECF4ACGQEWIQSQYR1bzo1I0gPoYCg+6I/stKEQ bgUCXT+S2AUJB2TlXwAKCRA+6I/stKEQbhNOB/9ooea0hU9Sgh7PBloU6CgaC5mlqPLB7NTp +JkB+nh3Fqhk+qLZwzEynnuDLl6ESpVHIc0Ym1lyF4gT3DsrlGT1h0Gzw7vUwd1+ZfN0CuIx Rn861U/dAUjvbtN5kMBqOI4/5ea+0r7MACcIVnKF/wMXBD8eypHsorT2sJTzwZ6DRCNP70C5 N1ahpqqNmXe0uLdP0pu55JCqhrGw2SinkRMdWyhSxT56uNwIVHGhLTqH7Q4t1N6G1EH626qa SvIJsWlNpll6Y3AYLDw2/Spw/hqieS2PQ/Ky3rPZnvJt7/aSNYsKoFGX0yjkH67Uq8Lx0k1L w8jpXnbEPQN3A2ZJCbeM Message-ID: Date: Fri, 16 Oct 2020 10:17:43 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/16/20 5:18 AM, Zong Li wrote: > Add a driver for the SiFive FU740 PRCI IP block, which handles more > clocks than FU540. These patches also refactor the original > implementation by spliting the dependent-code of fu540 and fu740 > respectively. > > Zong Li (4): > clk: sifive: Extract prci core to common base I don't see this patch, and it isn't listed on the web archive. Was it not CC'd to this list? --Sean > clk: sifive: Use common name for prci configuration > clk: sifive: Add a driver for the SiFive FU740 PRCI IP block > clk: sifive: Refactor __prci_clock array by using macro > > arch/riscv/Kconfig.socs | 2 +- > drivers/clk/sifive/Kconfig | 8 +- > drivers/clk/sifive/Makefile | 5 +- > drivers/clk/sifive/fu540-prci.c | 618 +----------------- > drivers/clk/sifive/fu540-prci.h | 21 + > drivers/clk/sifive/fu740-prci.c | 102 +++ > drivers/clk/sifive/fu740-prci.h | 21 + > drivers/clk/sifive/sifive-prci.c | 529 +++++++++++++++ > drivers/clk/sifive/sifive-prci.h | 297 +++++++++ > include/dt-bindings/clock/sifive-fu740-prci.h | 23 + > 10 files changed, 1032 insertions(+), 594 deletions(-) > create mode 100644 drivers/clk/sifive/fu540-prci.h > create mode 100644 drivers/clk/sifive/fu740-prci.c > create mode 100644 drivers/clk/sifive/fu740-prci.h > create mode 100644 drivers/clk/sifive/sifive-prci.c > create mode 100644 drivers/clk/sifive/sifive-prci.h > create mode 100644 include/dt-bindings/clock/sifive-fu740-prci.h >