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[23.83.240.116]) by smtp.gmail.com with ESMTPSA id s23sm2196668pgl.47.2020.10.20.06.58.18 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Oct 2020 06:58:18 -0700 (PDT) From: Dejin Zheng To: balbi@kernel.org, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Dejin Zheng , Thinh Nguyen Subject: [PATCH v3] usb: dwc3: core: fix a issue about clear connect state Date: Tue, 20 Oct 2020 21:58:06 +0800 Message-Id: <20201020135806.30268-1-zhengdejin5@gmail.com> X-Mailer: git-send-email 2.25.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According to Synopsys Programming Guide chapter 2.2 Register Resets, it cannot reset the DCTL register by setting DCTL.CSFTRST for core soft reset, if DWC3 controller as a slave device and stay connected with a usb host, then, while rebooting linux, it will fail to reinitialize dwc3 as a slave device when the DWC3 controller did not power off. because the connection status is incorrect, so we also need to clear DCTL.RUN_STOP bit for disabling connect when doing core soft reset. There will still be other stale configuration in DCTL, so reset the other fields of DCTL to the default value 0. Fixes: f59dcab176293b6 ("usb: dwc3: core: improve reset sequence") Suggested-by: Thinh Nguyen Signed-off-by: Dejin Zheng --- v2 -> v3: * Reset all fields of DCTL register by Thinh's suggest, Thanks for Thinh's help! v1 -> v2: * modify some commit messages by Sergei's suggest, Thanks very much for Sergei's help! drivers/usb/dwc3/core.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 2eb34c8b4065..86375cfd9481 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -254,9 +254,7 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc) if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) return 0; - reg = dwc3_readl(dwc->regs, DWC3_DCTL); - reg |= DWC3_DCTL_CSFTRST; - dwc3_writel(dwc->regs, DWC3_DCTL, reg); + dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST); /* * For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit -- 2.25.0