Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp4578398pxu; Tue, 20 Oct 2020 23:10:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxdGureDz5YLmBWqXeAw/nNfy1PcZ5CZ5sC8xtZwtT4HnWV2Q2f3f0dzWBkMdqyi8vvOy1E X-Received: by 2002:a17:906:cc53:: with SMTP id mm19mr1815496ejb.514.1603260604768; Tue, 20 Oct 2020 23:10:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603260604; cv=none; d=google.com; s=arc-20160816; b=OiZRKrB3YVnlmunQmyn1HFwjLsxt3W5MKKE6Nwb7JmYeCWISGjLLlkpMJer8zFMah7 JO9IqGZcXSRUn+lhAy/wpzX5KJStyND9jJ5hFp5O9bEB8SFyAJttOIxl3zBQR0gPnZEO tmCqG6lKYDR1fLTpT190LoLhe3QAgNs254SZutQ+w5FP0x2AdJ77t/IoG6MHBNmHh55y Q+VHVsuBWyl9biqJjqz8b0Yqt0EynfE6pNwLfD9fqOBIFCfdec2yhjUjuq74JFnNWtYv lIrW7V65L3ctTbn641KpDNNPIBvqiXJGC08imz02XYP2Ouu1jmPMtZfo5oBwmkPRHXIr 18aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=SFeBwkUn/dDhXTnD86F6OZeuGilRBUIWND1rdi/Y/kg=; b=D68ttrziYt/y2lqzQVYZlSra9Ww74HtkiVgvjN6BNSjyYA7336hu8B/PPNjBMiqIO6 N2PJg0c/Mz+xY0DOZ38Eg0u2R8vlMkH1JB4ch499rkvePWm9DwEC/127oq08j3i4muk5 PCW35z1b/agj2hV8qotch3RSWeerqBij0UKu3TBcN/Nlktz/0t9kEH4LL1lvujh8Syw+ 5IM8NnlRBA4jIRMp5nPCtoL4oZ2ClftrLUBlMyB7ZbBByzzqpAJjaMO06q6xqDpX2bVp bZU6YHeIff2jz9KyvS/h1Kaa4kQBBsEVZQTkBnk/rtD05j65YuWqO3Hpd//kngowi2B1 vM7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=RZobnZ05; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p18si736877edm.174.2020.10.20.23.09.42; Tue, 20 Oct 2020 23:10:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=RZobnZ05; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408544AbgJTPI4 (ORCPT + 99 others); Tue, 20 Oct 2020 11:08:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2408519AbgJTPIz (ORCPT ); Tue, 20 Oct 2020 11:08:55 -0400 Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E8DCC061755; Tue, 20 Oct 2020 08:08:55 -0700 (PDT) Received: by mail-wr1-x442.google.com with SMTP id i1so2589950wro.1; Tue, 20 Oct 2020 08:08:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=SFeBwkUn/dDhXTnD86F6OZeuGilRBUIWND1rdi/Y/kg=; b=RZobnZ05ih+Rqqkx+8PI3HMewGx7h+RU0lk2W+R6cz2W6sMFIA32Dm0b9ueilSUpa0 Opvp06mGNbBl1t7pMC2qbK3EaElYG2ULo9HTekKorx45iKG9+CVeAcswCH+lsEIPCDGu TXxd76Y2I3f5/mPeRU6IJCSQyUCzHOQZxjCp4Zbhv7SkH9Xu1fqbV2EAIP4MOz/M4Hv0 igerqviguRaETTRaW3u+W6oNFipcHFEqMCER8GWUEGpjeMF8P8g4hUtPkgBskQNeS/L4 3m8RwZ6xNEbqGMGzVBkUD28kmhNugQ6Jf45q4WTYX8bqMopURRpNCFuWZN/+Eas+6vgC T4tQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=SFeBwkUn/dDhXTnD86F6OZeuGilRBUIWND1rdi/Y/kg=; b=o65mmLrFPrRYydO4YP9bsggcxD2aHH+dclXVlAyKZcsR+IYaN/vhuL/ehoIlQm8Dig oitgaRaJWbJCTyKpdgqoY5IENpt4M81RXHMtkhMDpi6Dpp0WdJFo4qVNAr63jiQanIFR iIorXMfV4/jz3LVqpZfhWMjfArrOTMkRhKRQ0PhCkCktANa6PfGutP3tL1N1DsF9p/pF /5h3HSvApBIz2s8RMX8L2aTBTAdZ0n8QVILCZAjjetdWudRhaqdwSiSN9QhzJAdu2g96 JsE0JWdAGaulI3GG7t8SR66em1PZndLJ5RHY6kcCkUaKbZIDbzrXnxoXIcHsT72ANkpy xt0A== X-Gm-Message-State: AOAM530WZnEcf5orhuolotvBDpPIP61VPDFIZbBL14XfT9wC3GeFQC3S 2Tm7/7u1wgtFH3B3tmKR47UAhQipwNcV6ac7Yuc= X-Received: by 2002:a5d:4987:: with SMTP id r7mr3798344wrq.327.1603206533995; Tue, 20 Oct 2020 08:08:53 -0700 (PDT) MIME-Version: 1.0 References: <20201019211101.143327-1-robdclark@gmail.com> <20201020082404.GJ401619@phenom.ffwll.local> In-Reply-To: From: Rob Clark Date: Tue, 20 Oct 2020 08:08:42 -0700 Message-ID: Subject: Re: [PATCH 0/3] drm/msm: kthread_worker conversion To: Daniel Vetter Cc: dri-devel , Akhil P Oommen , Tanmay Shah , Bjorn Andersson , AngeloGioacchino Del Regno , Sam Ravnborg , Emil Velikov , Rob Clark , Jonathan Marek , Qinglang Miao , Roy Spliet , Wambui Karuga , linux-arm-msm , Sharat Masetty , Kalyan Thota , Rajendra Nayak , "Gustavo A. R. Silva" , open list , tongtiangen , Thomas Zimmermann , Drew Davenport , "open list:DRM DRIVER FOR MSM ADRENO GPU" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 20, 2020 at 7:29 AM Daniel Vetter wrote: > > On Tue, Oct 20, 2020 at 4:01 PM Rob Clark wrote: > > > > On Tue, Oct 20, 2020 at 1:24 AM Daniel Vetter wrote: > > > > > > On Mon, Oct 19, 2020 at 02:10:50PM -0700, Rob Clark wrote: > > > > From: Rob Clark > > > > > > > > In particular, converting the async atomic commit (for cursor updates, > > > > etc) to SCHED_FIFO kthread_worker helps with some cases where we > > > > wouldn't manage to flush the updates within the 1ms-before-vblank > > > > deadline resulting in fps drops when there is cursor movement. > > > > > > > > Rob Clark (3): > > > > drm/msm/gpu: Convert retire/recover work to kthread_worker > > > > drm/msm/kms: Update msm_kms_init/destroy > > > > drm/msm/atomic: Convert to per-CRTC kthread_work > > > > > > So i915 has it's own commit worker already for $reasons, but I don't think > > > that's a good path to go down with more drivers. And the problem seems > > > entirely generic in nature ... > > > > I'm not *entirely* sure what your point is here? This is just > > migrating away from a shared ordered wq to per-crtc kthread so that we > > don't miss vblank deadlines for silly reasons (and then stall on the > > next frame's pageflip because we are still waiting for the cursor > > update to latch). Kind of like vblank-work but scheduled prior to, > > rather than after, vblank. > > > > And you're right that the problem is partially generic.. hw that (a) > > doesn't have true async (cursor and/or otherwise) updates, and (b) has > > various flush bits that latch register updates on vblank, is not that > > uncommon. But the current atomic helper API would have to be a bit > > redesigned to look more like the interface between msm_atomic and the > > display backend. That is a fair bit of churn for re-using a small bit > > of code. > > I was making some assumptions about what you're doing, and I was > wrong. So I went and tried to understand what's actually going on > here. > > I'm trying to understand what exactly you've added with that async msm > support 2d99ced787e3d. I think this breaks the state structure update > model, you can't access any ->state pointers from the commit functions > after you've called drm_atomic_helper_commit_hw_done, or you might > have a use after free. And that seems to be happening from this commit > work thing you added to your existing commit work that the atomic > helpers provide already. > > The various commit functions seem to grab various state objects by > just chasing pointers from the objects (instead of the > drm_atomic_state stuff), so this all feels like it's yolo > free-wheeling. > > You also seem to be using the async_commit stuff from the atomic > helpers (which is actually synchronous (i.e. blocking) from the pov of > how the code runs, but seems to be for mdp5 only and not others. Also > your can_do_async still checks for legacy_cursor_update (maybe a > leftover, or needed on !mdp5 platforms) and ->async_update. > > I'm thoroughly confused how this all works. The legacy_cursor_update is really the thing that motivated the async commit support in the first place. Sadly we still have userspace that expects to be able to use legacy cursor API, and that it will be nonblocking (and not cause fps drop). (I'm not a fan of the legacy cursor UAPI.. don't hate the player..) The premise is to do everything in terms of crtc_mask, although yeah, it looks like there are a few points that need to look at things like crtc->state->active. The only point in msm-atomic itself that does this is vblank_get/put(), possibly we can fix drm_vblank instead and drop that workaround (see 43906812eaab06423f56af5cca9a9fcdbb4ac454) The rest of the async part is really just supposed to be writing the appropriate flush reg(s) and waiting until flush completes, although dpu's excess layering makes this harder than it needs to be. In practice, the kms->wait_flush() at the top of msm_atomic_commit_tail() will block until a pending async commit completes (this is where we hit the fps drop if we miss vblank deadline), so I don't *think* you can trigger a use-after-free. But the dpu code could be better cleaned up to have less obj->state dereference in the kms->flush_commit(crtc_mask)/etc path. BR, -R > I do agree though that you probably want this to be a real time fifo > kthread worker, like for the vblank worker. Except now that I looked, > I'm not sure it's actually working intended and correct. > -Daniel > > > BR, > > -R > > > > > -Daniel > > > > > > > > > > > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +-- > > > > drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 6 ++--- > > > > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 4 +-- > > > > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 +-- > > > > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 +++++- > > > > drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 8 +++++- > > > > drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 11 ++++++--- > > > > drivers/gpu/drm/msm/disp/mdp_kms.h | 9 +++++-- > > > > drivers/gpu/drm/msm/msm_atomic.c | 25 +++++++++++++++---- > > > > drivers/gpu/drm/msm/msm_drv.h | 3 ++- > > > > drivers/gpu/drm/msm/msm_gpu.c | 30 +++++++++++++++-------- > > > > drivers/gpu/drm/msm/msm_gpu.h | 13 +++++++--- > > > > drivers/gpu/drm/msm/msm_kms.h | 23 ++++++++++++++--- > > > > 13 files changed, 104 insertions(+), 43 deletions(-) > > > > > > > > -- > > > > 2.26.2 > > > > > > > > _______________________________________________ > > > > dri-devel mailing list > > > > dri-devel@lists.freedesktop.org > > > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > > > > > -- > > > Daniel Vetter > > > Software Engineer, Intel Corporation > > > http://blog.ffwll.ch > > _______________________________________________ > > dri-devel mailing list > > dri-devel@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch