Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp5355075pxu; Wed, 21 Oct 2020 23:09:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw8hqmaUicu8GKga7wX6Wc2eEgwPmRM8DAe264oM2dQ9X8//Ixdm/ebgtySsdY7D7h9X8jm X-Received: by 2002:aa7:c746:: with SMTP id c6mr809407eds.221.1603346952526; Wed, 21 Oct 2020 23:09:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603346952; cv=none; d=google.com; s=arc-20160816; b=BBI3Qwovxlh2XQRA2tLdXmVkZWSMD+5wzAKHha6ZeL5PvjvWBI7u4CTb77LcW9md2I Bop5nvCsrYKgNMQg8Y3QnpL34kchIGet8BogT8SFOieKBsPo4CJntO/b567BCgrIpvUn 3jPO5zUfu59mT2DhLvaMA7cbiIr0MMXqBcU/q67dUbiiT6ezTg5EScjIfg7PdlpRcJ0j XhKYTzZRo24VIrp/F2zeU9tprhxnCw/iSkrQ6lr8qRPHvmT+A16J3oKnSmtaMgQJTN2q JYfIj41uLrY0744edNFd84PWE6Lutv5ze/Y5xt4nF+qABh0TM0lA0OdZzxMSyjGvzHWh dV7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:cc:to:subject :message-id:date:from:in-reply-to:references:mime-version :dkim-signature; bh=ihmoWZZdPO2ce8CEz61ofc+t5dQR+1jglsub+bo9esU=; b=Clyw0PU9Fb629CZLeTMDCdYfoR8lP41fAsZuMmHj+AurTfMKHpvGCiMBrcjQ8NxXeQ bC8tFBFWZZq8NEbkxGu0OXuQ0NdWGb2BZmGWSCEBV3vPRc+sFkv9KNiGdWsoGIJCicPF QENunIuAWH7Co0spNRk6JNb+bTYl1DRsmcGvOid/igKBjm+tpYFrwET7dwEeHtAW4+Sx HqQ/Lj46/11rZQv/dgKZ/FgYqqZJ2bCvLnWV13p85JR02RlVGtuxRQxC1wWCaGWPR9bo MP7QjeAhHqNIFBqE84+VqGCh+e2zpGQSkhUtqW9ISmikTuJkwqoldNQ6AWgTMpZelGp1 GMCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="uul/3MRW"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w14si258955eje.646.2020.10.21.23.08.49; Wed, 21 Oct 2020 23:09:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="uul/3MRW"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438094AbgJURHT (ORCPT + 99 others); Wed, 21 Oct 2020 13:07:19 -0400 Received: from mail.kernel.org ([198.145.29.99]:43190 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390995AbgJURHS (ORCPT ); Wed, 21 Oct 2020 13:07:18 -0400 Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 19852223C6; Wed, 21 Oct 2020 17:07:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603300037; bh=cmX/YO3xz5pAF8CH4Yv2e+wNRl4pkQd8JHkdyLyXh1A=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=uul/3MRW1yCz1Mj6OHpN7L03VExvPsGkMsRM10hBPxslr6UgE2cIwbYwiJ6/srP9X eIJ0xDyWl5glw48AD5rG8IcPylxHA8AD7VQGdMeYPeEsPhfUYA6gLMq2yle8ZFkl1F +ZxctGWTnlfLf3f94y4EC0kzdcu+cJao5JZ8m0r0= Received: by mail-ej1-f45.google.com with SMTP id w27so385962ejb.3; Wed, 21 Oct 2020 10:07:17 -0700 (PDT) X-Gm-Message-State: AOAM530U2VPHVxEFvZGOH9fuSmaia6Ra+NhUL4CeTAs/hHS2Y+Nn0jO8 9sYzNQ6JSCKiB30A52rRL9jdhK8Mi4YSRjofHg== X-Received: by 2002:a17:906:95d1:: with SMTP id n17mr4668586ejy.75.1603300035519; Wed, 21 Oct 2020 10:07:15 -0700 (PDT) MIME-Version: 1.0 References: <20201020174253.3757771-1-fparent@baylibre.com> <20201020174253.3757771-5-fparent@baylibre.com> In-Reply-To: <20201020174253.3757771-5-fparent@baylibre.com> From: Chun-Kuang Hu Date: Thu, 22 Oct 2020 01:07:04 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 4/8] drm/mediatek: dsi: add pdata variable to start clk in HS mode To: Fabien Parent Cc: "moderated list:ARM/Mediatek SoC support" , Linux ARM , linux-kernel , DTML , DRI Development , Matthias Brugger , Rob Herring , Daniel Vetter , David Airlie , Philipp Zabel , Chun-Kuang Hu Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Fabien: Fabien Parent =E6=96=BC 2020=E5=B9=B410=E6=9C=8821= =E6=97=A5 =E9=80=B1=E4=B8=89 =E4=B8=8A=E5=8D=881:43=E5=AF=AB=E9=81=93=EF=BC= =9A > > On MT8167, DSI seems to work fine only if we start the clk in HS mode. > If we don't start the clk in HS but try to switch later to HS, the > display does not work. > > This commit adds a platform data variable to be used to start the > DSI clk in HS mode at power on. This patch looks like a hack patch. If you cowork with Mediatek, please find out the correct solution or give a reasonable explanation. If you could not get help from Mediatek, I would wait for comment on this patch. Regards, Chun-Kuang. > > Signed-off-by: Fabien Parent > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediate= k/mtk_dsi.c > index 4a188a942c38..461643c05689 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -175,6 +175,7 @@ struct mtk_dsi_driver_data { > const u32 reg_cmdq_off; > bool has_shadow_ctl; > bool has_size_ctl; > + bool use_hs_on_power_on; > }; > > struct mtk_dsi { > @@ -671,7 +672,7 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) > > mtk_dsi_clk_ulp_mode_leave(dsi); > mtk_dsi_lane0_ulp_mode_leave(dsi); > - mtk_dsi_clk_hs_mode(dsi, 0); > + mtk_dsi_clk_hs_mode(dsi, !!dsi->driver_data->use_hs_on_power_on); > > return 0; > err_disable_engine_clk: > -- > 2.28.0 >