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Wed, 21 Oct 2020 21:04:03 +0000 (UTC) Subject: Re: [PATCH v4 4/4] PCI: Limit pci_alloc_irq_vectors() to housekeeping CPUs To: Thomas Gleixner , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, intel-wired-lan@lists.osuosl.org, frederic@kernel.org, mtosatti@redhat.com, sassmann@redhat.com, jesse.brandeburg@intel.com, lihong.yang@intel.com, helgaas@kernel.org, jeffrey.t.kirsher@intel.com, jacob.e.keller@intel.com, jlelli@redhat.com, hch@infradead.org, bhelgaas@google.com, mike.marciniszyn@intel.com, dennis.dalessandro@intel.com, thomas.lendacky@amd.com, jiri@nvidia.com, mingo@redhat.com, peterz@infradead.org, juri.lelli@redhat.com, vincent.guittot@linaro.org, lgoncalv@redhat.com, Jakub Kicinski , Dave Miller References: <20200928183529.471328-1-nitesh@redhat.com> <20200928183529.471328-5-nitesh@redhat.com> <87v9f57zjf.fsf@nanos.tec.linutronix.de> <3bca9eb1-a318-1fc6-9eee-aacc0293a193@redhat.com> <87lfg093fo.fsf@nanos.tec.linutronix.de> <877drj72cz.fsf@nanos.tec.linutronix.de> From: Nitesh Narayan Lal Autocrypt: addr=nitesh@redhat.com; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <877drj72cz.fsf@nanos.tec.linutronix.de> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=nitesh@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="19tJzs4pDB5hORMaKvDJ8V6aBKOyjfvgw" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --19tJzs4pDB5hORMaKvDJ8V6aBKOyjfvgw Content-Type: multipart/mixed; boundary="fpjpftGGct6Kgqold4nIRFi6tHAQ5oppN" --fpjpftGGct6Kgqold4nIRFi6tHAQ5oppN Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Content-Language: en-US On 10/21/20 4:25 PM, Thomas Gleixner wrote: > On Tue, Oct 20 2020 at 20:07, Thomas Gleixner wrote: >> On Tue, Oct 20 2020 at 12:18, Nitesh Narayan Lal wrote: >>> However, IMHO we would still need a logic to prevent the devices from >>> creating excess vectors. >> Managed interrupts are preventing exactly that by pinning the interrupts >> and queues to one or a set of CPUs, which prevents vector exhaustion on >> CPU hotplug. >> >> Non-managed, yes that is and always was a problem. One of the reasons >> why managed interrupts exist. > But why is this only a problem for isolation? The very same problem > exists vs. CPU hotplug and therefore hibernation. > > On x86 we have at max. 204 vectors available for device interrupts per > CPU. So assumed the only device interrupt in use is networking then any > machine which has more than 204 network interrupts (queues, aux ...) > active will prevent the machine from hibernation. Yes, that is indeed the case. > > Aside of that it's silly to have multiple queues targeted at a single > CPU in case of hotplug. And that's not a theoretical problem. Some > power management schemes shut down sockets when the utilization of a > system is low enough, e.g. outside of working hours. > > The whole point of multi-queue is to have locality so that traffic from > a CPU goes through the CPU local queue. What's the point of having two > or more queues on a CPU in case of hotplug? > > The right answer to this is to utilize managed interrupts and have > according logic in your network driver to handle CPU hotplug. When a CPU > goes down, then the queue which is associated to that CPU is quiesced > and the interrupt core shuts down the relevant interrupt instead of > moving it to an online CPU (which causes the whole vector exhaustion > problem on x86). When the CPU comes online again, then the interrupt is > reenabled in the core and the driver reactivates the queue. IIRC then i40e does have something like that where it suspends all IRQs before hibernation and restores them when the CPU is back online. I am not particularly sure about the other drivers. This brings me to another discussion that Peter initiated that is to perform the proposed restriction without any condition for all non-managed IRQs. Something on the lines: +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!pci_is_managed(dev)) +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 max_vecs =3D clamp(hk_cpus, min_vecs, max_vecs); I am not particularly sure about this because I am not sure what kind of performance penalty this will have on the drivers in general and if that will be acceptable at all. Any thoughts? However, this still doesn't solve the generic problem, and an ideal solutio= n will be something that you suggested. Will it be sensible to think about having a generic API that can be consumed by all the drivers and that can do both the things you mentioned? > > Thanks, > > tglx > > > --=20 Thanks Nitesh --fpjpftGGct6Kgqold4nIRFi6tHAQ5oppN-- --19tJzs4pDB5hORMaKvDJ8V6aBKOyjfvgw Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEEkXcoRVGaqvbHPuAGo4ZA3AYyozkFAl+QokEACgkQo4ZA3AYy ozm8/BAAw3Ss+bADPfbH0Btpugh729jC6rE1B3DjGvzYJ31x04H+qfcbMeyAMoUB p+JMNfMAINsS2QgwgzC5sEP825/CWCxpMsWDpjYjaxegrC+4KW/uWlRtTddYoDlU vjJclY7406kHZr+djsB6kiPVJPxxsYhtsgUh0bsGrOpLHj3M6q5QmwF9eRQPuJgn xt7IEM+xtL/0S/QiHPOMIfRbMeAouYO9eeXMRDiCHL/uADwFHz6j8MSOpwZJ9zBk gpS/3ly0cL8t1sU1k36OE7V+oelMzqt1DTIv/KF9/LEhPeb7+Np/R2MGWrrYDAPv 4b8PzJCgC6uCaKQMIsqi9nciTogeTibOUKoh5PCdeRv86cDj815NqSeiRVCOaWuT xUGPQgrWIQzPMN4fdt7Ile6lRVv4e8wlRdgAMlBcW4gFamp97zyzcUHTZ957hOWE AKHWDUZizoaOPiL6hIHTGkHljv6uvVv5lv6+UlZz+fR9ArRYSZ8Y2BibBj/GRLqR IQD5BWjXNcq9izSNESPd6ionkxosjF8dmlP4PpZBMwwRfZ4toWLaDQvhfF7L5ODO aSqfFsdqSeZBDbB4zy6QpOmTraLKHly0cE4gD408BGbySJn8FoNXb7be/hNWQfJN F74wifFccM4/h26iT1M/EPn3R9h2y7keMrRL1p5OosZHKTRi9Bo= =oi9x -----END PGP SIGNATURE----- --19tJzs4pDB5hORMaKvDJ8V6aBKOyjfvgw--